337 	smu_data->smc_state_table.UvdBootLevel = 0;  in vegam_update_uvd_smc_table()
339 		smu_data->smc_state_table.UvdBootLevel =  in vegam_update_uvd_smc_table()
348 	mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24;  in vegam_update_uvd_smc_table()
358 				(uint32_t)(1 << smu_data->smc_state_table.UvdBootLevel),  in vegam_update_uvd_smc_table()
372 		smu_data->smc_state_table.VceBootLevel =  in vegam_update_vce_smc_table()
375 		smu_data->smc_state_table.VceBootLevel = 0;  in vegam_update_vce_smc_table()
384 	mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16;  in vegam_update_vce_smc_table()
391 				(uint32_t)1 << smu_data->smc_state_table.VceBootLevel,  in vegam_update_vce_smc_table()
590 	smu_data->smc_state_table.LinkLevelCount =  in vegam_populate_smc_link_level()
723 	const SMU75_Discrete_DpmTable *table = &(smu_data->smc_state_table);  in vegam_calculate_sclk_params()
879 			smu_data->smc_state_table.GraphicsLevel;  in vegam_populate_all_graphic_levels()
886 	vegam_get_sclk_range_table(hwmgr, &(smu_data->smc_state_table));  in vegam_populate_all_graphic_levels()
892 				&(smu_data->smc_state_table.GraphicsLevel[i]));  in vegam_populate_all_graphic_levels()
906 		smu_data->smc_state_table.GraphicsLevel[0].SclkSetting.SSc_En = 0;  in vegam_populate_all_graphic_levels()
908 	smu_data->smc_state_table.GraphicsDpmLevelCount =  in vegam_populate_all_graphic_levels()
1046 			smu_data->smc_state_table.MemoryLevel;  in vegam_populate_all_memory_levels()
1066 	smu_data->smc_state_table.MemoryDpmLevelCount =  in vegam_populate_all_memory_levels()
1414 			smu_data->smc_state_table.GraphicsBootLevel = level;  in vegam_populate_smc_initial_state()
1423 			smu_data->smc_state_table.MemoryBootLevel = level;  in vegam_populate_smc_initial_state()
1443 	SMU75_Discrete_DpmTable  *table = &(smu_data->smc_state_table);  in vegam_populate_bapm_parameters_in_dpm_table()
1510 		smu_data->smc_state_table.Sclk_CKS_masterEn0_7 |=  in vegam_populate_clock_stretcher_data_table()
1523 		smu_data->smc_state_table.Sclk_voltageOffset[i] = volt_offset;  in vegam_populate_clock_stretcher_data_table()
1526 	smu_data->smc_state_table.LdoRefSel =  in vegam_populate_clock_stretcher_data_table()
1566 	SMU75_Discrete_DpmTable  *table = &(smu_data->smc_state_table);  in vegam_populate_avfs_parameters()
1925 	struct SMU75_Discrete_DpmTable *table = &(smu_data->smc_state_table);  in vegam_init_smc_table()