125 	PP_ASSERT_WITH_CODE(priv->smu_tables.entry[table_id].version != 0,  in smu10_copy_table_from_smc()
127 	PP_ASSERT_WITH_CODE(priv->smu_tables.entry[table_id].size != 0,  in smu10_copy_table_from_smc()
131 			upper_32_bits(priv->smu_tables.entry[table_id].mc_addr),  in smu10_copy_table_from_smc()
135 			lower_32_bits(priv->smu_tables.entry[table_id].mc_addr),  in smu10_copy_table_from_smc()
139 			priv->smu_tables.entry[table_id].table_id,  in smu10_copy_table_from_smc()
144 	memcpy(table, (uint8_t *)priv->smu_tables.entry[table_id].table,  in smu10_copy_table_from_smc()
145 			priv->smu_tables.entry[table_id].size);  in smu10_copy_table_from_smc()
159 	PP_ASSERT_WITH_CODE(priv->smu_tables.entry[table_id].version != 0,  in smu10_copy_table_to_smc()
161 	PP_ASSERT_WITH_CODE(priv->smu_tables.entry[table_id].size != 0,  in smu10_copy_table_to_smc()
164 	memcpy(priv->smu_tables.entry[table_id].table, table,  in smu10_copy_table_to_smc()
165 			priv->smu_tables.entry[table_id].size);  in smu10_copy_table_to_smc()
171 			upper_32_bits(priv->smu_tables.entry[table_id].mc_addr),  in smu10_copy_table_to_smc()
175 			lower_32_bits(priv->smu_tables.entry[table_id].mc_addr),  in smu10_copy_table_to_smc()
179 			priv->smu_tables.entry[table_id].table_id,  in smu10_copy_table_to_smc()
208 		amdgpu_bo_free_kernel(&priv->smu_tables.entry[SMU10_WMTABLE].handle,  in smu10_smu_fini()
209 					&priv->smu_tables.entry[SMU10_WMTABLE].mc_addr,  in smu10_smu_fini()
210 					&priv->smu_tables.entry[SMU10_WMTABLE].table);  in smu10_smu_fini()
211 		amdgpu_bo_free_kernel(&priv->smu_tables.entry[SMU10_CLOCKTABLE].handle,  in smu10_smu_fini()
212 					&priv->smu_tables.entry[SMU10_CLOCKTABLE].mc_addr,  in smu10_smu_fini()
213 					&priv->smu_tables.entry[SMU10_CLOCKTABLE].table);  in smu10_smu_fini()
255 			&priv->smu_tables.entry[SMU10_WMTABLE].handle,  in smu10_smu_init()
256 			&priv->smu_tables.entry[SMU10_WMTABLE].mc_addr,  in smu10_smu_init()
257 			&priv->smu_tables.entry[SMU10_WMTABLE].table);  in smu10_smu_init()
262 	priv->smu_tables.entry[SMU10_WMTABLE].version = 0x01;  in smu10_smu_init()
263 	priv->smu_tables.entry[SMU10_WMTABLE].size = sizeof(Watermarks_t);  in smu10_smu_init()
264 	priv->smu_tables.entry[SMU10_WMTABLE].table_id = TABLE_WATERMARKS;  in smu10_smu_init()
270 			&priv->smu_tables.entry[SMU10_CLOCKTABLE].handle,  in smu10_smu_init()
271 			&priv->smu_tables.entry[SMU10_CLOCKTABLE].mc_addr,  in smu10_smu_init()
272 			&priv->smu_tables.entry[SMU10_CLOCKTABLE].table);  in smu10_smu_init()
277 	priv->smu_tables.entry[SMU10_CLOCKTABLE].version = 0x01;  in smu10_smu_init()
278 	priv->smu_tables.entry[SMU10_CLOCKTABLE].size = sizeof(DpmClocks_t);  in smu10_smu_init()
279 	priv->smu_tables.entry[SMU10_CLOCKTABLE].table_id = TABLE_DPMCLOCKS;  in smu10_smu_init()
284 	amdgpu_bo_free_kernel(&priv->smu_tables.entry[SMU10_WMTABLE].handle,  in smu10_smu_init()
285 				&priv->smu_tables.entry[SMU10_WMTABLE].mc_addr,  in smu10_smu_init()
286 				&priv->smu_tables.entry[SMU10_WMTABLE].table);  in smu10_smu_init()