432 	SMU74_Discrete_DpmTable  *table = &(smu_data->smc_state_table);  in polaris10_populate_bapm_parameters_in_dpm_table()
478 	SMU74_Discrete_DpmTable  *table = &(smu_data->smc_state_table);  in polaris10_populate_zero_rpm_parameters()
836 	smu_data->smc_state_table.LinkLevelCount =  in polaris10_populate_smc_link_level()
894 	const SMU74_Discrete_DpmTable *table = &(smu_data->smc_state_table);  in polaris10_calculate_sclk_params()
1029 	SMU74_Discrete_DpmTable *table = &(smu_data->smc_state_table);  in polaris10_get_vddc_shared_railinfo()
1051 			smu_data->smc_state_table.GraphicsLevel;  in polaris10_populate_all_graphic_levels()
1065 	polaris10_get_sclk_range_table(hwmgr, &(smu_data->smc_state_table));  in polaris10_populate_all_graphic_levels()
1071 				&(smu_data->smc_state_table.GraphicsLevel[i]));  in polaris10_populate_all_graphic_levels()
1081 		smu_data->smc_state_table.GraphicsLevel[0].SclkSetting.SSc_En = 0;  in polaris10_populate_all_graphic_levels()
1097 	smu_data->smc_state_table.GraphicsDpmLevelCount =  in polaris10_populate_all_graphic_levels()
1102 	for (i = 0; i < smu_data->smc_state_table.GraphicsDpmLevelCount; i++)  in polaris10_populate_all_graphic_levels()
1103 		smu_data->smc_state_table.GraphicsLevel[i].EnabledForActivity =  in polaris10_populate_all_graphic_levels()
1220 			smu_data->smc_state_table.MemoryLevel;  in polaris10_populate_all_memory_levels()
1236 	smu_data->smc_state_table.MemoryDpmLevelCount =  in polaris10_populate_all_memory_levels()
1241 	for (i = 0; i < smu_data->smc_state_table.MemoryDpmLevelCount; i++)  in polaris10_populate_all_memory_levels()
1242 		smu_data->smc_state_table.MemoryLevel[i].EnabledForActivity =  in polaris10_populate_all_memory_levels()
1630 			smu_data->smc_state_table.GraphicsBootLevel = level;  in polaris10_populate_smc_initailial_state()
1639 			smu_data->smc_state_table.MemoryBootLevel = level;  in polaris10_populate_smc_initailial_state()
1672 		smu_data->smc_state_table.Sclk_CKS_masterEn0_7 |=  in polaris10_populate_clock_stretcher_data_table()
1690 		smu_data->smc_state_table.Sclk_voltageOffset[i] = volt_offset;  in polaris10_populate_clock_stretcher_data_table()
1693 …smu_data->smc_state_table.LdoRefSel = (table_info->cac_dtp_table->ucCKS_LDO_REFSEL != 0) ? table_i…  in polaris10_populate_clock_stretcher_data_table()
1775 	SMU74_Discrete_DpmTable  *table = &(smu_data->smc_state_table);  in polaris10_populate_avfs_parameters()
1921 	struct SMU74_Discrete_DpmTable *table = &(smu_data->smc_state_table);  in polaris10_init_smc_table()
2288 	smu_data->smc_state_table.UvdBootLevel = 0;  in polaris10_update_uvd_smc_table()
2290 		smu_data->smc_state_table.UvdBootLevel =  in polaris10_update_uvd_smc_table()
2299 	mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24;  in polaris10_update_uvd_smc_table()
2309 				(uint32_t)(1 << smu_data->smc_state_table.UvdBootLevel),  in polaris10_update_uvd_smc_table()
2323 		smu_data->smc_state_table.VceBootLevel =  in polaris10_update_vce_smc_table()
2326 		smu_data->smc_state_table.VceBootLevel = 0;  in polaris10_update_vce_smc_table()
2335 	mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16;  in polaris10_update_vce_smc_table()
2342 				(uint32_t)1 << smu_data->smc_state_table.VceBootLevel,  in polaris10_update_vce_smc_table()
2594 			smu_data->smc_state_table.GraphicsLevel;  in polaris10_update_dpm_settings()
2601 			smu_data->smc_state_table.MemoryLevel;  in polaris10_update_dpm_settings()
2613 		for (i = 0; i < smu_data->smc_state_table.GraphicsDpmLevelCount; i++) {  in polaris10_update_dpm_settings()
2648 		for (i = 0; i < smu_data->smc_state_table.MemoryDpmLevelCount; i++) {  in polaris10_update_dpm_settings()