787 	smu_data->smc_state_table.LinkLevelCount =  in iceland_populate_smc_link_level()
970 	SMU71_Discrete_GraphicsLevel *levels = smu_data->smc_state_table.GraphicsLevel;  in iceland_populate_all_graphic_levels()
983 					&(smu_data->smc_state_table.GraphicsLevel[i]));  in iceland_populate_all_graphic_levels()
989 			smu_data->smc_state_table.GraphicsLevel[i].DeepSleepDivId = 0;  in iceland_populate_all_graphic_levels()
993 	smu_data->smc_state_table.GraphicsLevel[0].EnabledForActivity = 1;  in iceland_populate_all_graphic_levels()
997 		smu_data->smc_state_table.GraphicsLevel[dpm_table->sclk_table.count-1].DisplayWatermark =  in iceland_populate_all_graphic_levels()
1000 	smu_data->smc_state_table.GraphicsDpmLevelCount =  in iceland_populate_all_graphic_levels()
1027 		smu_data->smc_state_table.GraphicsLevel[i].pcieDpmLevel = highest_pcie_level_enabled;  in iceland_populate_all_graphic_levels()
1031 	smu_data->smc_state_table.GraphicsLevel[0].pcieDpmLevel = lowest_pcie_level_enabled;  in iceland_populate_all_graphic_levels()
1034 	smu_data->smc_state_table.GraphicsLevel[1].pcieDpmLevel = mid_pcie_level_enabled;  in iceland_populate_all_graphic_levels()
1356 	SMU71_Discrete_MemoryLevel *levels = smu_data->smc_state_table.MemoryLevel;  in iceland_populate_all_memory_levels()
1365 			&(smu_data->smc_state_table.MemoryLevel[i]));  in iceland_populate_all_memory_levels()
1372 	smu_data->smc_state_table.MemoryLevel[0].EnabledForActivity = 1;  in iceland_populate_all_memory_levels()
1379 	smu_data->smc_state_table.MemoryLevel[0].ActivityLevel = 0x1F;  in iceland_populate_all_memory_levels()
1380 	CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.MemoryLevel[0].ActivityLevel);  in iceland_populate_all_memory_levels()
1382 	smu_data->smc_state_table.MemoryDpmLevelCount = (uint8_t)dpm_table->mclk_table.count;  in iceland_populate_all_memory_levels()
1385 …smu_data->smc_state_table.MemoryLevel[dpm_table->mclk_table.count-1].DisplayWatermark = PPSMC_DISP…  in iceland_populate_all_memory_levels()
1659 			(uint32_t *)&(smu_data->smc_state_table.GraphicsBootLevel));  in iceland_populate_smc_boot_level()
1662 		smu_data->smc_state_table.GraphicsBootLevel = 0;  in iceland_populate_smc_boot_level()
1669 		(uint32_t *)&(smu_data->smc_state_table.MemoryBootLevel));  in iceland_populate_smc_boot_level()
1672 		smu_data->smc_state_table.MemoryBootLevel = 0;  in iceland_populate_smc_boot_level()
1831 			smu_data->smc_state_table.GraphicsBootLevel = level;  in iceland_populate_smc_initial_state()
1841 			smu_data->smc_state_table.MemoryBootLevel = level;  in iceland_populate_smc_initial_state()
1854 	SMU71_Discrete_DpmTable  *dpm_table = &(smu_data->smc_state_table);  in iceland_populate_bapm_parameters_in_dpm_table()
1934 	SMU71_Discrete_DpmTable  *table = &(smu_data->smc_state_table);  in iceland_init_smc_table()
1938 	memset(&(smu_data->smc_state_table), 0x00, sizeof(smu_data->smc_state_table));  in iceland_init_smc_table()