483 			smu_data->smc_state_table.GraphicsLevel;  in ci_populate_all_graphic_levels()
493 			smu_data->smc_state_table.GraphicsLevel[i].DeepSleepDivId = 0;  in ci_populate_all_graphic_levels()
495 			smu_data->smc_state_table.GraphicsLevel[i].DisplayWatermark =  in ci_populate_all_graphic_levels()
499 	smu_data->smc_state_table.GraphicsLevel[0].EnabledForActivity = 1;  in ci_populate_all_graphic_levels()
501 	smu_data->smc_state_table.GraphicsDpmLevelCount = (u8)dpm_table->sclk_table.count;  in ci_populate_all_graphic_levels()
720 	SMU7_Discrete_DpmTable  *dpm_table = &(smu_data->smc_state_table);  in ci_populate_bapm_parameters_in_dpm_table()
1015 	smu_data->smc_state_table.LinkLevelCount =  in ci_populate_smc_link_level()
1311 	SMU7_Discrete_MemoryLevel *levels = smu_data->smc_state_table.MemoryLevel;  in ci_populate_all_memory_levels()
1320 			&(smu_data->smc_state_table.MemoryLevel[i]));  in ci_populate_all_memory_levels()
1325 	smu_data->smc_state_table.MemoryLevel[0].EnabledForActivity = 1;  in ci_populate_all_memory_levels()
1331 		smu_data->smc_state_table.MemoryLevel[1].MinVddci =  in ci_populate_all_memory_levels()
1332 				smu_data->smc_state_table.MemoryLevel[0].MinVddci;  in ci_populate_all_memory_levels()
1333 		smu_data->smc_state_table.MemoryLevel[1].MinMvdd =  in ci_populate_all_memory_levels()
1334 				smu_data->smc_state_table.MemoryLevel[0].MinMvdd;  in ci_populate_all_memory_levels()
1336 	smu_data->smc_state_table.MemoryLevel[0].ActivityLevel = 0x1F;  in ci_populate_all_memory_levels()
1337 	CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.MemoryLevel[0].ActivityLevel);  in ci_populate_all_memory_levels()
1339 	smu_data->smc_state_table.MemoryDpmLevelCount = (uint8_t)dpm_table->mclk_table.count;  in ci_populate_all_memory_levels()
1341 …smu_data->smc_state_table.MemoryLevel[dpm_table->mclk_table.count-1].DisplayWatermark = PPSMC_DISP…  in ci_populate_all_memory_levels()
1698 			(uint32_t *)&(smu_data->smc_state_table.GraphicsBootLevel));  in ci_populate_smc_boot_level()
1701 		smu_data->smc_state_table.GraphicsBootLevel = 0;  in ci_populate_smc_boot_level()
1708 		(uint32_t *)&(smu_data->smc_state_table.MemoryBootLevel));  in ci_populate_smc_boot_level()
1711 		smu_data->smc_state_table.MemoryBootLevel = 0;  in ci_populate_smc_boot_level()
1865 			smu_data->smc_state_table.GraphicsBootLevel = level;  in ci_populate_smc_initial_state()
1875 			smu_data->smc_state_table.MemoryBootLevel = level;  in ci_populate_smc_initial_state()
1947 	SMU7_Discrete_DpmTable  *table = &(smu_data->smc_state_table);  in ci_init_smc_table()
1952 	memset(&(smu_data->smc_state_table), 0x00, sizeof(smu_data->smc_state_table));  in ci_init_smc_table()
2767 			smu_data->smc_state_table.GraphicsLevel;  in ci_update_dpm_settings()
2774 			smu_data->smc_state_table.MemoryLevel;  in ci_update_dpm_settings()
2786 		for (i = 0; i < smu_data->smc_state_table.GraphicsDpmLevelCount; i++) {  in ci_update_dpm_settings()
2821 		for (i = 0; i < smu_data->smc_state_table.MemoryDpmLevelCount; i++) {  in ci_update_dpm_settings()
2871 		smu_data->smc_state_table.UvdBootLevel = 0;  in ci_update_uvd_smc_table()
2873 		smu_data->smc_state_table.UvdBootLevel = uvd_table->count - 1;  in ci_update_uvd_smc_table()
2876 				UvdBootLevel, smu_data->smc_state_table.UvdBootLevel);  in ci_update_uvd_smc_table()