803 	uint32_t en = (enable ? 1 : 0);  in vega10_didt_set_mask()  local
808 				     DIDT_SQ_CTRL0, DIDT_CTRL_EN, en);  in vega10_didt_set_mask()
810 		didt_block_info |= en << SQ_Enable_SHIFT;  in vega10_didt_set_mask()
815 				     DIDT_DB_CTRL0, DIDT_CTRL_EN, en);  in vega10_didt_set_mask()
817 		didt_block_info |= en << DB_Enable_SHIFT;  in vega10_didt_set_mask()
822 				     DIDT_TD_CTRL0, DIDT_CTRL_EN, en);  in vega10_didt_set_mask()
824 		didt_block_info |= en << TD_Enable_SHIFT;  in vega10_didt_set_mask()
829 				     DIDT_TCP_CTRL0, DIDT_CTRL_EN, en);  in vega10_didt_set_mask()
831 		didt_block_info |= en << TCP_Enable_SHIFT;  in vega10_didt_set_mask()
836 				     DIDT_DBR_CTRL0, DIDT_CTRL_EN, en);  in vega10_didt_set_mask()
842 			data = REG_SET_FIELD(data, DIDT_SQ_EDC_CTRL, EDC_EN, en);  in vega10_didt_set_mask()
843 			data = REG_SET_FIELD(data, DIDT_SQ_EDC_CTRL, EDC_SW_RST, ~en);  in vega10_didt_set_mask()
849 			data = REG_SET_FIELD(data, DIDT_DB_EDC_CTRL, EDC_EN, en);  in vega10_didt_set_mask()
850 			data = REG_SET_FIELD(data, DIDT_DB_EDC_CTRL, EDC_SW_RST, ~en);  in vega10_didt_set_mask()
856 			data = REG_SET_FIELD(data, DIDT_TD_EDC_CTRL, EDC_EN, en);  in vega10_didt_set_mask()
857 			data = REG_SET_FIELD(data, DIDT_TD_EDC_CTRL, EDC_SW_RST, ~en);  in vega10_didt_set_mask()
863 			data = REG_SET_FIELD(data, DIDT_TCP_EDC_CTRL, EDC_EN, en);  in vega10_didt_set_mask()
864 			data = REG_SET_FIELD(data, DIDT_TCP_EDC_CTRL, EDC_SW_RST, ~en);  in vega10_didt_set_mask()
870 			data = REG_SET_FIELD(data, DIDT_DBR_EDC_CTRL, EDC_EN, en);  in vega10_didt_set_mask()
871 			data = REG_SET_FIELD(data, DIDT_DBR_EDC_CTRL, EDC_SW_RST, ~en);  in vega10_didt_set_mask()