Lines Matching refs:tmp_result
1566 int tmp_result = 0; in smu7_enable_dpm_tasks() local
1570 tmp_result = smu7_enable_voltage_control(hwmgr); in smu7_enable_dpm_tasks()
1571 PP_ASSERT_WITH_CODE(tmp_result == 0, in smu7_enable_dpm_tasks()
1573 result = tmp_result); in smu7_enable_dpm_tasks()
1575 tmp_result = smu7_construct_voltage_tables(hwmgr); in smu7_enable_dpm_tasks()
1576 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1578 result = tmp_result); in smu7_enable_dpm_tasks()
1592 tmp_result = smu7_program_static_screen_threshold_parameters(hwmgr); in smu7_enable_dpm_tasks()
1593 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1595 result = tmp_result); in smu7_enable_dpm_tasks()
1597 tmp_result = smu7_enable_display_gap(hwmgr); in smu7_enable_dpm_tasks()
1598 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1599 "Failed to enable display gap!", result = tmp_result); in smu7_enable_dpm_tasks()
1601 tmp_result = smu7_program_voting_clients(hwmgr); in smu7_enable_dpm_tasks()
1602 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1603 "Failed to program voting clients!", result = tmp_result); in smu7_enable_dpm_tasks()
1605 tmp_result = smum_process_firmware_header(hwmgr); in smu7_enable_dpm_tasks()
1606 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1607 "Failed to process firmware header!", result = tmp_result); in smu7_enable_dpm_tasks()
1610 tmp_result = smu7_initial_switch_from_arbf0_to_f1(hwmgr); in smu7_enable_dpm_tasks()
1611 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1613 result = tmp_result); in smu7_enable_dpm_tasks()
1620 tmp_result = smum_init_smc_table(hwmgr); in smu7_enable_dpm_tasks()
1621 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1622 "Failed to initialize SMC table!", result = tmp_result); in smu7_enable_dpm_tasks()
1624 tmp_result = smu7_enable_vrhot_gpio_interrupt(hwmgr); in smu7_enable_dpm_tasks()
1625 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1626 "Failed to enable VR hot GPIO interrupt!", result = tmp_result); in smu7_enable_dpm_tasks()
1630 tmp_result = smu7_notify_has_display(hwmgr); in smu7_enable_dpm_tasks()
1631 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1632 "Failed to enable display setting!", result = tmp_result); in smu7_enable_dpm_tasks()
1639 tmp_result = smu7_populate_edc_leakage_registers(hwmgr); in smu7_enable_dpm_tasks()
1640 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1641 "Failed to populate edc leakage registers!", result = tmp_result); in smu7_enable_dpm_tasks()
1644 tmp_result = smu7_enable_sclk_control(hwmgr); in smu7_enable_dpm_tasks()
1645 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1646 "Failed to enable SCLK control!", result = tmp_result); in smu7_enable_dpm_tasks()
1648 tmp_result = smu7_enable_smc_voltage_controller(hwmgr); in smu7_enable_dpm_tasks()
1649 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1650 "Failed to enable voltage control!", result = tmp_result); in smu7_enable_dpm_tasks()
1652 tmp_result = smu7_enable_ulv(hwmgr); in smu7_enable_dpm_tasks()
1653 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1654 "Failed to enable ULV!", result = tmp_result); in smu7_enable_dpm_tasks()
1656 tmp_result = smu7_enable_deep_sleep_master_switch(hwmgr); in smu7_enable_dpm_tasks()
1657 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1658 "Failed to enable deep sleep master switch!", result = tmp_result); in smu7_enable_dpm_tasks()
1660 tmp_result = smu7_enable_didt_config(hwmgr); in smu7_enable_dpm_tasks()
1661 PP_ASSERT_WITH_CODE((tmp_result == 0), in smu7_enable_dpm_tasks()
1662 "Failed to enable deep sleep master switch!", result = tmp_result); in smu7_enable_dpm_tasks()
1664 tmp_result = smu7_start_dpm(hwmgr); in smu7_enable_dpm_tasks()
1665 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1666 "Failed to start DPM!", result = tmp_result); in smu7_enable_dpm_tasks()
1668 tmp_result = smu7_enable_smc_cac(hwmgr); in smu7_enable_dpm_tasks()
1669 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1670 "Failed to enable SMC CAC!", result = tmp_result); in smu7_enable_dpm_tasks()
1672 tmp_result = smu7_enable_power_containment(hwmgr); in smu7_enable_dpm_tasks()
1673 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1674 "Failed to enable power containment!", result = tmp_result); in smu7_enable_dpm_tasks()
1676 tmp_result = smu7_power_control_set_level(hwmgr); in smu7_enable_dpm_tasks()
1677 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1678 "Failed to power control set level!", result = tmp_result); in smu7_enable_dpm_tasks()
1680 tmp_result = smu7_enable_thermal_auto_throttle(hwmgr); in smu7_enable_dpm_tasks()
1681 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1682 "Failed to enable thermal auto throttle!", result = tmp_result); in smu7_enable_dpm_tasks()
1684 tmp_result = smu7_pcie_performance_request(hwmgr); in smu7_enable_dpm_tasks()
1685 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_enable_dpm_tasks()
1686 "pcie performance request failed!", result = tmp_result); in smu7_enable_dpm_tasks()
1738 int tmp_result, result = 0; in smu7_disable_dpm_tasks() local
1745 tmp_result = smu7_disable_power_containment(hwmgr); in smu7_disable_dpm_tasks()
1746 PP_ASSERT_WITH_CODE((tmp_result == 0), in smu7_disable_dpm_tasks()
1747 "Failed to disable power containment!", result = tmp_result); in smu7_disable_dpm_tasks()
1749 tmp_result = smu7_disable_smc_cac(hwmgr); in smu7_disable_dpm_tasks()
1750 PP_ASSERT_WITH_CODE((tmp_result == 0), in smu7_disable_dpm_tasks()
1751 "Failed to disable SMC CAC!", result = tmp_result); in smu7_disable_dpm_tasks()
1753 tmp_result = smu7_disable_didt_config(hwmgr); in smu7_disable_dpm_tasks()
1754 PP_ASSERT_WITH_CODE((tmp_result == 0), in smu7_disable_dpm_tasks()
1755 "Failed to disable DIDT!", result = tmp_result); in smu7_disable_dpm_tasks()
1762 tmp_result = smu7_disable_thermal_auto_throttle(hwmgr); in smu7_disable_dpm_tasks()
1763 PP_ASSERT_WITH_CODE((tmp_result == 0), in smu7_disable_dpm_tasks()
1764 "Failed to disable thermal auto throttle!", result = tmp_result); in smu7_disable_dpm_tasks()
1766 tmp_result = smu7_avfs_control(hwmgr, false); in smu7_disable_dpm_tasks()
1767 PP_ASSERT_WITH_CODE((tmp_result == 0), in smu7_disable_dpm_tasks()
1768 "Failed to disable AVFS!", result = tmp_result); in smu7_disable_dpm_tasks()
1770 tmp_result = smu7_stop_dpm(hwmgr); in smu7_disable_dpm_tasks()
1771 PP_ASSERT_WITH_CODE((tmp_result == 0), in smu7_disable_dpm_tasks()
1772 "Failed to stop DPM!", result = tmp_result); in smu7_disable_dpm_tasks()
1774 tmp_result = smu7_disable_deep_sleep_master_switch(hwmgr); in smu7_disable_dpm_tasks()
1775 PP_ASSERT_WITH_CODE((tmp_result == 0), in smu7_disable_dpm_tasks()
1776 "Failed to disable deep sleep master switch!", result = tmp_result); in smu7_disable_dpm_tasks()
1778 tmp_result = smu7_disable_ulv(hwmgr); in smu7_disable_dpm_tasks()
1779 PP_ASSERT_WITH_CODE((tmp_result == 0), in smu7_disable_dpm_tasks()
1780 "Failed to disable ULV!", result = tmp_result); in smu7_disable_dpm_tasks()
1782 tmp_result = smu7_clear_voting_clients(hwmgr); in smu7_disable_dpm_tasks()
1783 PP_ASSERT_WITH_CODE((tmp_result == 0), in smu7_disable_dpm_tasks()
1784 "Failed to clear voting clients!", result = tmp_result); in smu7_disable_dpm_tasks()
1786 tmp_result = smu7_reset_to_default(hwmgr); in smu7_disable_dpm_tasks()
1787 PP_ASSERT_WITH_CODE((tmp_result == 0), in smu7_disable_dpm_tasks()
1788 "Failed to reset to default!", result = tmp_result); in smu7_disable_dpm_tasks()
1790 tmp_result = smum_stop_smc(hwmgr); in smu7_disable_dpm_tasks()
1791 PP_ASSERT_WITH_CODE((tmp_result == 0), in smu7_disable_dpm_tasks()
1792 "Failed to stop smc!", result = tmp_result); in smu7_disable_dpm_tasks()
1794 tmp_result = smu7_force_switch_to_arbf0(hwmgr); in smu7_disable_dpm_tasks()
1795 PP_ASSERT_WITH_CODE((tmp_result == 0), in smu7_disable_dpm_tasks()
1796 "Failed to force to switch arbf0!", result = tmp_result); in smu7_disable_dpm_tasks()
2375 int tmp_result; in smu7_complete_dependency_tables() local
2381 tmp_result = smu7_patch_lookup_table_with_leakage(hwmgr, in smu7_complete_dependency_tables()
2383 if (tmp_result != 0) in smu7_complete_dependency_tables()
2384 result = tmp_result; in smu7_complete_dependency_tables()
2390 tmp_result = smu7_patch_lookup_table_with_leakage(hwmgr, in smu7_complete_dependency_tables()
2392 if (tmp_result) in smu7_complete_dependency_tables()
2393 result = tmp_result; in smu7_complete_dependency_tables()
2395 tmp_result = smu7_patch_clock_voltage_limits_with_vddc_leakage(hwmgr, in smu7_complete_dependency_tables()
2397 if (tmp_result) in smu7_complete_dependency_tables()
2398 result = tmp_result; in smu7_complete_dependency_tables()
2401 tmp_result = smu7_patch_voltage_dependency_tables_with_lookup_table(hwmgr); in smu7_complete_dependency_tables()
2402 if (tmp_result) in smu7_complete_dependency_tables()
2403 result = tmp_result; in smu7_complete_dependency_tables()
2405 tmp_result = smu7_calc_voltage_dependency_tables(hwmgr); in smu7_complete_dependency_tables()
2406 if (tmp_result) in smu7_complete_dependency_tables()
2407 result = tmp_result; in smu7_complete_dependency_tables()
2409 tmp_result = smu7_calc_mm_voltage_dependency_table(hwmgr); in smu7_complete_dependency_tables()
2410 if (tmp_result) in smu7_complete_dependency_tables()
2411 result = tmp_result; in smu7_complete_dependency_tables()
2413 tmp_result = smu7_sort_lookup_table(hwmgr, table_info->vddgfx_lookup_table); in smu7_complete_dependency_tables()
2414 if (tmp_result) in smu7_complete_dependency_tables()
2415 result = tmp_result; in smu7_complete_dependency_tables()
2417 tmp_result = smu7_sort_lookup_table(hwmgr, table_info->vddc_lookup_table); in smu7_complete_dependency_tables()
2418 if (tmp_result) in smu7_complete_dependency_tables()
2419 result = tmp_result; in smu7_complete_dependency_tables()
4476 int tmp_result, result = 0; in smu7_set_power_state_tasks() local
4479 tmp_result = smu7_find_dpm_states_clocks_in_dpm_table(hwmgr, input); in smu7_set_power_state_tasks()
4480 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_set_power_state_tasks()
4482 result = tmp_result); in smu7_set_power_state_tasks()
4486 tmp_result = in smu7_set_power_state_tasks()
4488 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_set_power_state_tasks()
4490 result = tmp_result); in smu7_set_power_state_tasks()
4493 tmp_result = smu7_freeze_sclk_mclk_dpm(hwmgr); in smu7_set_power_state_tasks()
4494 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_set_power_state_tasks()
4495 "Failed to freeze SCLK MCLK DPM!", result = tmp_result); in smu7_set_power_state_tasks()
4497 tmp_result = smu7_populate_and_upload_sclk_mclk_dpm_levels(hwmgr, input); in smu7_set_power_state_tasks()
4498 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_set_power_state_tasks()
4500 result = tmp_result); in smu7_set_power_state_tasks()
4509 tmp_result = smu7_update_avfs(hwmgr); in smu7_set_power_state_tasks()
4510 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_set_power_state_tasks()
4512 result = tmp_result); in smu7_set_power_state_tasks()
4514 tmp_result = smu7_generate_dpm_level_enable_mask(hwmgr, input); in smu7_set_power_state_tasks()
4515 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_set_power_state_tasks()
4517 result = tmp_result); in smu7_set_power_state_tasks()
4519 tmp_result = smum_update_sclk_threshold(hwmgr); in smu7_set_power_state_tasks()
4520 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_set_power_state_tasks()
4522 result = tmp_result); in smu7_set_power_state_tasks()
4524 tmp_result = smu7_unfreeze_sclk_mclk_dpm(hwmgr); in smu7_set_power_state_tasks()
4525 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_set_power_state_tasks()
4527 result = tmp_result); in smu7_set_power_state_tasks()
4529 tmp_result = smu7_upload_dpm_level_enable_mask(hwmgr); in smu7_set_power_state_tasks()
4530 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_set_power_state_tasks()
4532 result = tmp_result); in smu7_set_power_state_tasks()
4534 tmp_result = smu7_notify_smc_display(hwmgr); in smu7_set_power_state_tasks()
4535 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_set_power_state_tasks()
4537 result = tmp_result); in smu7_set_power_state_tasks()
4541 tmp_result = in smu7_set_power_state_tasks()
4543 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_set_power_state_tasks()
4545 result = tmp_result); in smu7_set_power_state_tasks()
4881 int tmp_result, result = 0; in smu7_setup_asic_task() local
4885 tmp_result = smu7_read_clock_registers(hwmgr); in smu7_setup_asic_task()
4886 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_setup_asic_task()
4887 "Failed to read clock registers!", result = tmp_result); in smu7_setup_asic_task()
4889 tmp_result = smu7_get_memory_type(hwmgr); in smu7_setup_asic_task()
4890 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_setup_asic_task()
4891 "Failed to get memory type!", result = tmp_result); in smu7_setup_asic_task()
4893 tmp_result = smu7_enable_acpi_power_management(hwmgr); in smu7_setup_asic_task()
4894 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_setup_asic_task()
4895 "Failed to enable ACPI power management!", result = tmp_result); in smu7_setup_asic_task()
4897 tmp_result = smu7_init_power_gate_state(hwmgr); in smu7_setup_asic_task()
4898 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_setup_asic_task()
4899 "Failed to init power gate state!", result = tmp_result); in smu7_setup_asic_task()
4901 tmp_result = smu7_get_mc_microcode_version(hwmgr); in smu7_setup_asic_task()
4902 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_setup_asic_task()
4903 "Failed to get MC microcode version!", result = tmp_result); in smu7_setup_asic_task()
4905 tmp_result = smu7_init_sclk_threshold(hwmgr); in smu7_setup_asic_task()
4906 PP_ASSERT_WITH_CODE((0 == tmp_result), in smu7_setup_asic_task()
4907 "Failed to init sclk threshold!", result = tmp_result); in smu7_setup_asic_task()