67 	uint32_t *en)  in offset_to_id()  argument
75 			*en = GPIO_GENERIC_A;  in offset_to_id()
78 			*en = GPIO_GENERIC_B;  in offset_to_id()
81 			*en = GPIO_GENERIC_C;  in offset_to_id()
84 			*en = GPIO_GENERIC_D;  in offset_to_id()
87 			*en = GPIO_GENERIC_E;  in offset_to_id()
90 			*en = GPIO_GENERIC_F;  in offset_to_id()
93 			*en = GPIO_GENERIC_G;  in offset_to_id()
105 			*en = GPIO_HPD_1;  in offset_to_id()
108 			*en = GPIO_HPD_2;  in offset_to_id()
111 			*en = GPIO_HPD_3;  in offset_to_id()
114 			*en = GPIO_HPD_4;  in offset_to_id()
117 			*en = GPIO_HPD_5;  in offset_to_id()
120 			*en = GPIO_HPD_6;  in offset_to_id()
132 			*en = GPIO_SYNC_HSYNC_A;  in offset_to_id()
135 			*en = GPIO_SYNC_VSYNC_A;  in offset_to_id()
147 			*en = GPIO_GSL_GENLOCK_CLOCK;  in offset_to_id()
150 			*en = GPIO_GSL_GENLOCK_VSYNC;  in offset_to_id()
153 			*en = GPIO_GSL_SWAPLOCK_A;  in offset_to_id()
156 			*en = GPIO_GSL_SWAPLOCK_B;  in offset_to_id()
166 		*en = index_from_vector(mask);  in offset_to_id()
167 		return (*en <= GPIO_GPIO_PAD_MAX);  in offset_to_id()
173 		*en = GPIO_DDC_LINE_DDC1;  in offset_to_id()
176 		*en = GPIO_DDC_LINE_DDC2;  in offset_to_id()
179 		*en = GPIO_DDC_LINE_DDC3;  in offset_to_id()
182 		*en = GPIO_DDC_LINE_DDC4;  in offset_to_id()
185 		*en = GPIO_DDC_LINE_DDC5;  in offset_to_id()
188 		*en = GPIO_DDC_LINE_DDC6;  in offset_to_id()
191 		*en = GPIO_DDC_LINE_DDC_VGA;  in offset_to_id()
195 		*en = GPIO_DDC_LINE_I2C_PAD;  in offset_to_id()
212 	uint32_t en,  in id_to_offset()  argument
220 		switch (en) {  in id_to_offset()
252 		switch (en) {  in id_to_offset()
284 		switch (en) {  in id_to_offset()
313 		switch (en) {  in id_to_offset()
338 		switch (en) {  in id_to_offset()
355 		switch (en) {  in id_to_offset()
380 		info->mask = (1 << en);  in id_to_offset()