Lines Matching refs:disp_dlg_regs

999 		struct _vcs_dpi_display_dlg_regs_st *disp_dlg_regs,  in dml1_rq_dlg_get_dlg_params()  argument
1134 memset(disp_dlg_regs, 0, sizeof(*disp_dlg_regs)); in dml1_rq_dlg_get_dlg_params()
1153 disp_dlg_regs->ref_freq_to_pix_freq = in dml1_rq_dlg_get_dlg_params()
1155 disp_dlg_regs->refcyc_per_htotal = (unsigned int) (ref_freq_to_pix_freq * (double) htotal in dml1_rq_dlg_get_dlg_params()
1157 disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end in dml1_rq_dlg_get_dlg_params()
1159 ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int) dml_pow(2, 13)); in dml1_rq_dlg_get_dlg_params()
1160 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; /* 15 bits */ in dml1_rq_dlg_get_dlg_params()
1175 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start in dml1_rq_dlg_get_dlg_params()
1177 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); in dml1_rq_dlg_get_dlg_params()
1189 disp_dlg_regs->min_dst_y_next_start); in dml1_rq_dlg_get_dlg_params()
1439 disp_dlg_regs->dst_y_after_scaler = dst_y_after_scaler; /* in terms of line */ in dml1_rq_dlg_get_dlg_params()
1440disp_dlg_regs->refcyc_x_after_scaler = dst_x_after_scaler * ref_freq_to_pix_freq; /* in terms of r… in dml1_rq_dlg_get_dlg_params()
1441 ASSERT(disp_dlg_regs->refcyc_x_after_scaler < (unsigned int) dml_pow(2, 13)); in dml1_rq_dlg_get_dlg_params()
1445 disp_dlg_regs->dst_y_after_scaler); in dml1_rq_dlg_get_dlg_params()
1449 disp_dlg_regs->refcyc_x_after_scaler); in dml1_rq_dlg_get_dlg_params()
1451 disp_dlg_regs->dst_y_prefetch = (unsigned int) (dst_y_prefetch * dml_pow(2, 2)); in dml1_rq_dlg_get_dlg_params()
1455 disp_dlg_regs->dst_y_prefetch); in dml1_rq_dlg_get_dlg_params()
1462 disp_dlg_regs->dst_y_per_vm_vblank = (unsigned int) (dst_y_per_vm_vblank * dml_pow(2, 2)); in dml1_rq_dlg_get_dlg_params()
1466 disp_dlg_regs->dst_y_per_row_vblank = (unsigned int) (dst_y_per_row_vblank * dml_pow(2, 2)); in dml1_rq_dlg_get_dlg_params()
1520 disp_dlg_regs->vratio_prefetch = (unsigned int) dml_pow(2, 21) - 1; in dml1_rq_dlg_get_dlg_params()
1522 disp_dlg_regs->vratio_prefetch = (unsigned int) (vratio_pre_l * dml_pow(2, 19)); in dml1_rq_dlg_get_dlg_params()
1526 disp_dlg_regs->vratio_prefetch_c = (unsigned int) dml_pow(2, 21) - 1; in dml1_rq_dlg_get_dlg_params()
1528 disp_dlg_regs->vratio_prefetch_c = (unsigned int) (vratio_pre_c * dml_pow(2, 19)); in dml1_rq_dlg_get_dlg_params()
1530 disp_dlg_regs->refcyc_per_pte_group_vblank_l = in dml1_rq_dlg_get_dlg_params()
1533 ASSERT(disp_dlg_regs->refcyc_per_pte_group_vblank_l < (unsigned int) dml_pow(2, 13)); in dml1_rq_dlg_get_dlg_params()
1535 disp_dlg_regs->refcyc_per_pte_group_vblank_c = in dml1_rq_dlg_get_dlg_params()
1538 ASSERT(disp_dlg_regs->refcyc_per_pte_group_vblank_c < (unsigned int) dml_pow(2, 13)); in dml1_rq_dlg_get_dlg_params()
1540 disp_dlg_regs->refcyc_per_meta_chunk_vblank_l = in dml1_rq_dlg_get_dlg_params()
1543 ASSERT(disp_dlg_regs->refcyc_per_meta_chunk_vblank_l < (unsigned int) dml_pow(2, 13)); in dml1_rq_dlg_get_dlg_params()
1545 disp_dlg_regs->refcyc_per_meta_chunk_vblank_c = in dml1_rq_dlg_get_dlg_params()
1546disp_dlg_regs->refcyc_per_meta_chunk_vblank_l;/* dcc for 4:2:0 is not supported in dcn1.0. assign… in dml1_rq_dlg_get_dlg_params()
1559 disp_dlg_regs->dst_y_per_pte_row_nom_l = (unsigned int) ((double) dpte_row_height_l in dml1_rq_dlg_get_dlg_params()
1561 ASSERT(disp_dlg_regs->dst_y_per_pte_row_nom_l < (unsigned int) dml_pow(2, 17)); in dml1_rq_dlg_get_dlg_params()
1563 disp_dlg_regs->dst_y_per_pte_row_nom_c = (unsigned int) ((double) dpte_row_height_c in dml1_rq_dlg_get_dlg_params()
1565 ASSERT(disp_dlg_regs->dst_y_per_pte_row_nom_c < (unsigned int) dml_pow(2, 17)); in dml1_rq_dlg_get_dlg_params()
1567 disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int) ((double) meta_row_height_l in dml1_rq_dlg_get_dlg_params()
1569 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int) dml_pow(2, 17)); in dml1_rq_dlg_get_dlg_params()
1571disp_dlg_regs->dst_y_per_meta_row_nom_c = disp_dlg_regs->dst_y_per_meta_row_nom_l; /* dcc for 4:2:… in dml1_rq_dlg_get_dlg_params()
1573 disp_dlg_regs->refcyc_per_pte_group_nom_l = (unsigned int) ((double) dpte_row_height_l in dml1_rq_dlg_get_dlg_params()
1576 if (disp_dlg_regs->refcyc_per_pte_group_nom_l >= (unsigned int) dml_pow(2, 23)) in dml1_rq_dlg_get_dlg_params()
1577 disp_dlg_regs->refcyc_per_pte_group_nom_l = dml_pow(2, 23) - 1; in dml1_rq_dlg_get_dlg_params()
1579 disp_dlg_regs->refcyc_per_pte_group_nom_c = (unsigned int) ((double) dpte_row_height_c in dml1_rq_dlg_get_dlg_params()
1582 if (disp_dlg_regs->refcyc_per_pte_group_nom_c >= (unsigned int) dml_pow(2, 23)) in dml1_rq_dlg_get_dlg_params()
1583 disp_dlg_regs->refcyc_per_pte_group_nom_c = dml_pow(2, 23) - 1; in dml1_rq_dlg_get_dlg_params()
1585 disp_dlg_regs->refcyc_per_meta_chunk_nom_l = (unsigned int) ((double) meta_row_height_l in dml1_rq_dlg_get_dlg_params()
1588 if (disp_dlg_regs->refcyc_per_meta_chunk_nom_l >= (unsigned int) dml_pow(2, 23)) in dml1_rq_dlg_get_dlg_params()
1589 disp_dlg_regs->refcyc_per_meta_chunk_nom_l = dml_pow(2, 23) - 1; in dml1_rq_dlg_get_dlg_params()
1689 disp_dlg_regs->refcyc_per_line_delivery_pre_l = (unsigned int) dml_floor( in dml1_rq_dlg_get_dlg_params()
1692 disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor( in dml1_rq_dlg_get_dlg_params()
1695 ASSERT(disp_dlg_regs->refcyc_per_line_delivery_pre_l < (unsigned int) dml_pow(2, 13)); in dml1_rq_dlg_get_dlg_params()
1696 ASSERT(disp_dlg_regs->refcyc_per_line_delivery_l < (unsigned int) dml_pow(2, 13)); in dml1_rq_dlg_get_dlg_params()
1728 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor( in dml1_rq_dlg_get_dlg_params()
1731 disp_dlg_regs->refcyc_per_line_delivery_c = (unsigned int) dml_floor( in dml1_rq_dlg_get_dlg_params()
1734 ASSERT(disp_dlg_regs->refcyc_per_line_delivery_pre_c < (unsigned int) dml_pow(2, 13)); in dml1_rq_dlg_get_dlg_params()
1735 ASSERT(disp_dlg_regs->refcyc_per_line_delivery_c < (unsigned int) dml_pow(2, 13)); in dml1_rq_dlg_get_dlg_params()
1737 disp_dlg_regs->chunk_hdl_adjust_cur0 = 3; in dml1_rq_dlg_get_dlg_params()
1927 print__dlg_regs_st(mode_lib, disp_dlg_regs); in dml1_rq_dlg_get_dlg_params()