365 		if (bw_params->clk_table.entries[i].dcfclk_mhz > max_clk_data.dcfclk_mhz)  in build_synthetic_soc_states()
366 			max_clk_data.dcfclk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz;  in build_synthetic_soc_states()
367 		if (bw_params->clk_table.entries[i].fclk_mhz > max_clk_data.fclk_mhz)  in build_synthetic_soc_states()
368 			max_clk_data.fclk_mhz = bw_params->clk_table.entries[i].fclk_mhz;  in build_synthetic_soc_states()
369 		if (bw_params->clk_table.entries[i].memclk_mhz > max_clk_data.memclk_mhz)  in build_synthetic_soc_states()
370 			max_clk_data.memclk_mhz = bw_params->clk_table.entries[i].memclk_mhz;  in build_synthetic_soc_states()
371 		if (bw_params->clk_table.entries[i].dispclk_mhz > max_clk_data.dispclk_mhz)  in build_synthetic_soc_states()
372 			max_clk_data.dispclk_mhz = bw_params->clk_table.entries[i].dispclk_mhz;  in build_synthetic_soc_states()
373 		if (bw_params->clk_table.entries[i].dppclk_mhz > max_clk_data.dppclk_mhz)  in build_synthetic_soc_states()
374 			max_clk_data.dppclk_mhz = bw_params->clk_table.entries[i].dppclk_mhz;  in build_synthetic_soc_states()
375 		if (bw_params->clk_table.entries[i].phyclk_mhz > max_clk_data.phyclk_mhz)  in build_synthetic_soc_states()
376 			max_clk_data.phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz;  in build_synthetic_soc_states()
377 		if (bw_params->clk_table.entries[i].dtbclk_mhz > max_clk_data.dtbclk_mhz)  in build_synthetic_soc_states()
378 			max_clk_data.dtbclk_mhz = bw_params->clk_table.entries[i].dtbclk_mhz;  in build_synthetic_soc_states()
380 		if (bw_params->clk_table.entries[i].memclk_mhz > 0) {  in build_synthetic_soc_states()
382 			if (bw_params->clk_table.entries[i].memclk_mhz <= bw_params->dc_mode_limit.memclk_mhz)  in build_synthetic_soc_states()
385 		if (bw_params->clk_table.entries[i].fclk_mhz > 0) {  in build_synthetic_soc_states()
387 			if (bw_params->clk_table.entries[i].fclk_mhz <= bw_params->dc_mode_limit.fclk_mhz)  in build_synthetic_soc_states()
390 		if (bw_params->clk_table.entries[i].dcfclk_mhz > 0) {  in build_synthetic_soc_states()
392 			if (bw_params->clk_table.entries[i].dcfclk_mhz <= bw_params->dc_mode_limit.dcfclk_mhz)  in build_synthetic_soc_states()
407 	if (num_dcfclk_dpms > 0 && bw_params->clk_table.entries[0].fclk_mhz > min_fclk_mhz)  in build_synthetic_soc_states()
408 		min_fclk_mhz = bw_params->clk_table.entries[0].fclk_mhz;  in build_synthetic_soc_states()
457 		entry.dram_speed_mts = bw_params->clk_table.entries[i].memclk_mhz * 16;  in build_synthetic_soc_states()
468 			entry.fabricclk_mhz = bw_params->clk_table.entries[i].fclk_mhz;  in build_synthetic_soc_states()
524 			if (bw_params->clk_table.entries[j].memclk_mhz * 16 >= table[i].dram_speed_mts) {  in build_synthetic_soc_states()
525 				table[i].dram_speed_mts = bw_params->clk_table.entries[j].memclk_mhz * 16;  in build_synthetic_soc_states()
535 				if (bw_params->clk_table.entries[j].fclk_mhz >= table[i].fabricclk_mhz) {  in build_synthetic_soc_states()
536 					table[i].fabricclk_mhz = bw_params->clk_table.entries[j].fclk_mhz;  in build_synthetic_soc_states()
708 			if (bw_params->clk_table.entries[i].dcfclk_mhz > max_dcfclk_mhz)  in dcn321_update_bw_bounding_box_fpu()
709 				max_dcfclk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz;  in dcn321_update_bw_bounding_box_fpu()
710 			if (bw_params->clk_table.entries[i].dispclk_mhz > max_dispclk_mhz)  in dcn321_update_bw_bounding_box_fpu()
711 				max_dispclk_mhz = bw_params->clk_table.entries[i].dispclk_mhz;  in dcn321_update_bw_bounding_box_fpu()
712 			if (bw_params->clk_table.entries[i].dppclk_mhz > max_dppclk_mhz)  in dcn321_update_bw_bounding_box_fpu()
713 				max_dppclk_mhz = bw_params->clk_table.entries[i].dppclk_mhz;  in dcn321_update_bw_bounding_box_fpu()
714 			if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz)  in dcn321_update_bw_bounding_box_fpu()
715 				max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz;  in dcn321_update_bw_bounding_box_fpu()
746 			dcn321_get_optimal_dcfclk_fclk_for_uclk(bw_params->clk_table.entries[i].memclk_mhz * 16,  in dcn321_update_bw_bounding_box_fpu()
748 			if (optimal_dcfclk_for_uclk[i] < bw_params->clk_table.entries[0].dcfclk_mhz) {  in dcn321_update_bw_bounding_box_fpu()
749 				optimal_dcfclk_for_uclk[i] = bw_params->clk_table.entries[0].dcfclk_mhz;  in dcn321_update_bw_bounding_box_fpu()
758 							bw_params->clk_table.entries[j].memclk_mhz * 16;  in dcn321_update_bw_bounding_box_fpu()
774 					dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16;  in dcn321_update_bw_bounding_box_fpu()
789 			dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16;  in dcn321_update_bw_bounding_box_fpu()
816 				if (!bw_params->clk_table.entries[i].dtbclk_mhz) {  in dcn321_update_bw_bounding_box_fpu()
819 					dcn3_21_soc.clock_limits[i].dtbclk_mhz  = bw_params->clk_table.entries[i].dtbclk_mhz;  in dcn321_update_bw_bounding_box_fpu()
821 			} else if (bw_params->clk_table.entries[i].dtbclk_mhz) {  in dcn321_update_bw_bounding_box_fpu()
822 				dcn3_21_soc.clock_limits[i].dtbclk_mhz  = bw_params->clk_table.entries[i].dtbclk_mhz;  in dcn321_update_bw_bounding_box_fpu()
825 			if (!bw_params->clk_table.entries[i].socclk_mhz && i > 0)  in dcn321_update_bw_bounding_box_fpu()
828 				dcn3_21_soc.clock_limits[i].socclk_mhz = bw_params->clk_table.entries[i].socclk_mhz;  in dcn321_update_bw_bounding_box_fpu()