135 		ASSERT(pte_row_height_linear >= 8);  in dml32_rq_dlg_get_rq_reg()
144 			ASSERT(p1_pte_row_height_linear >= 8);  in dml32_rq_dlg_get_rq_reg()
273 	ASSERT(ref_freq_to_pix_freq < 4.0);  in dml32_rq_dlg_get_dlg_reg()
345 	ASSERT(dlg_regs->refcyc_h_blank_end < (unsigned int)dml_pow(2, 13));  in dml32_rq_dlg_get_dlg_reg()
371 	ASSERT(dst_y_per_vm_vblank < max_dst_y_per_vm_vblank);  in dml32_rq_dlg_get_dlg_reg()
372 	ASSERT(dst_y_per_row_vblank < max_dst_y_per_row_vblank);  in dml32_rq_dlg_get_dlg_reg()
373 	ASSERT(dst_y_prefetch > (dst_y_per_vm_vblank + dst_y_per_row_vblank));  in dml32_rq_dlg_get_dlg_reg()
427 	ASSERT(src->num_cursors <= 1);  in dml32_rq_dlg_get_dlg_reg()
442 	ASSERT(dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18));  in dml32_rq_dlg_get_dlg_reg()
555 	ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13));  in dml32_rq_dlg_get_dlg_reg()
556 	ASSERT(refcyc_per_req_delivery_l < dml_pow(2, 13));  in dml32_rq_dlg_get_dlg_reg()
557 	ASSERT(refcyc_per_req_delivery_pre_c < dml_pow(2, 13));  in dml32_rq_dlg_get_dlg_reg()
558 	ASSERT(refcyc_per_req_delivery_c < dml_pow(2, 13));  in dml32_rq_dlg_get_dlg_reg()
571 	ASSERT(dlg_regs->dst_y_after_scaler < (unsigned int) 8);  in dml32_rq_dlg_get_dlg_reg()
572 	ASSERT(dlg_regs->refcyc_x_after_scaler < (unsigned int)dml_pow(2, 13));  in dml32_rq_dlg_get_dlg_reg()
573 	ASSERT(dlg_regs->dst_y_per_pte_row_nom_l < (unsigned int)dml_pow(2, 17));  in dml32_rq_dlg_get_dlg_reg()
581 	ASSERT(dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int)dml_pow(2, 17));  in dml32_rq_dlg_get_dlg_reg()
582 	ASSERT(dlg_regs->dst_y_per_meta_row_nom_c < (unsigned int)dml_pow(2, 17));  in dml32_rq_dlg_get_dlg_reg()
590 	ASSERT(dlg_regs->refcyc_per_pte_group_vblank_l < (unsigned int)dml_pow(2, 13));  in dml32_rq_dlg_get_dlg_reg()
592 		ASSERT(dlg_regs->refcyc_per_pte_group_vblank_c < (unsigned int)dml_pow(2, 13));  in dml32_rq_dlg_get_dlg_reg()
601 	ASSERT(dlg_regs->refcyc_per_meta_chunk_vblank_l < (unsigned int)dml_pow(2, 13));  in dml32_rq_dlg_get_dlg_reg()
602 	ASSERT(dlg_regs->refcyc_per_meta_chunk_vblank_c < (unsigned int)dml_pow(2, 13));  in dml32_rq_dlg_get_dlg_reg()
603 	ASSERT(dlg_regs->refcyc_per_line_delivery_pre_l < (unsigned int)dml_pow(2, 13));  in dml32_rq_dlg_get_dlg_reg()
604 	ASSERT(dlg_regs->refcyc_per_line_delivery_l < (unsigned int)dml_pow(2, 13));  in dml32_rq_dlg_get_dlg_reg()
605 	ASSERT(dlg_regs->refcyc_per_line_delivery_pre_c < (unsigned int)dml_pow(2, 13));  in dml32_rq_dlg_get_dlg_reg()
606 	ASSERT(dlg_regs->refcyc_per_line_delivery_c < (unsigned int)dml_pow(2, 13));  in dml32_rq_dlg_get_dlg_reg()
607 	ASSERT(ttu_regs->qos_level_low_wm < dml_pow(2, 14));  in dml32_rq_dlg_get_dlg_reg()
608 	ASSERT(ttu_regs->qos_level_high_wm < dml_pow(2, 14));  in dml32_rq_dlg_get_dlg_reg()
609 	ASSERT(ttu_regs->min_ttu_vblank < dml_pow(2, 24));  in dml32_rq_dlg_get_dlg_reg()