226 				.dppclk_mhz = 513.0,
237 				.dppclk_mhz = 642.0,
248 				.dppclk_mhz = 734.0,
259 				.dppclk_mhz = 1100.0,
270 				.dppclk_mhz = 1284.0,
282 				.dppclk_mhz = 1284.0,
337 				.dppclk_mhz = 513.0,
348 				.dppclk_mhz = 642.0,
359 				.dppclk_mhz = 734.0,
370 				.dppclk_mhz = 1100.0,
381 				.dppclk_mhz = 1284.0,
393 				.dppclk_mhz = 1284.0,
448 			.dppclk_mhz = 513.0,
459 			.dppclk_mhz = 642.0,
470 			.dppclk_mhz = 734.0,
481 			.dppclk_mhz = 1100.0,
492 			.dppclk_mhz = 1284.0,
503 			.dppclk_mhz = 1284.0,
629 				.dppclk_mhz = 400.00,
640 				.dppclk_mhz = 626.09,
651 				.dppclk_mhz = 685.71,
662 				.dppclk_mhz = 757.89,
673 				.dppclk_mhz = 847.06,
684 				.dppclk_mhz = 960.00,
695 				.dppclk_mhz = 1028.57,
706 				.dppclk_mhz = 1285.00,
718 				.dppclk_mhz = 1285.0,
1192 		if (context->bw_ctx.bw.dcn.clk.dppclk_khz < pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000)  in dcn20_calculate_dlg_params()
1193 			context->bw_ctx.bw.dcn.clk.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000;  in dcn20_calculate_dlg_params()
1195 						pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000;  in dcn20_calculate_dlg_params()
1212 ….dcn.clk.max_supported_dppclk_khz = context->bw_ctx.dml.soc.clock_limits[vlevel].dppclk_mhz * 1000;  in dcn20_calculate_dlg_params()
1741 			pipes[pipe_cnt].clks_cfg.dppclk_mhz =  in dcn20_calculate_wm()
1750 			pipes[pipe_cnt].clks_cfg.dppclk_mhz =  in dcn20_calculate_wm()
1761 			pipes[pipe_cnt].clks_cfg.dppclk_mhz = context->bw_ctx.dml.soc.clock_limits[0].dppclk_mhz;  in dcn20_calculate_wm()
1765 		if (dc->debug.min_dpp_clk_khz > pipes[pipe_cnt].clks_cfg.dppclk_mhz * 1000)  in dcn20_calculate_wm()
1766 			pipes[pipe_cnt].clks_cfg.dppclk_mhz = dc->debug.min_dpp_clk_khz / 1000.0;  in dcn20_calculate_wm()
1886 		bb->clock_limits[i].dppclk_mhz = max_clocks->displayClockInKhz / 1000;  in dcn20_update_bounding_box()
1930 		if ((bb->clock_limits[i].dppclk_mhz > (max_clocks.dppClockInKhz / 1000))  in dcn20_cap_soc_clocks()
1932 			bb->clock_limits[i].dppclk_mhz = (max_clocks.dppClockInKhz / 1000);  in dcn20_cap_soc_clocks()
1955 		if (bb->clock_limits[i-1].dppclk_mhz != bb->clock_limits[i].dppclk_mhz)  in dcn20_cap_soc_clocks()
2254 				pipes[pipe_cnt].clks_cfg.dppclk_mhz =  in dcn21_calculate_wm()
2263 				pipes[pipe_cnt].clks_cfg.dppclk_mhz =  in dcn21_calculate_wm()
2384 	low_pstate_lvl.dppclk_mhz = dcn2_1_soc.clock_limits[high_voltage_lvl].dppclk_mhz;  in construct_low_pstate_lvl()
2437 		s[k].dppclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dppclk_mhz;  in dcn21_update_bw_bounding_box()