dml/dcn20/dcn20_fpu.c

223 				.dcfclk_mhz = 560.0,
234 				.dcfclk_mhz = 694.0,
245 				.dcfclk_mhz = 875.0,
256 				.dcfclk_mhz = 1000.0,
267 				.dcfclk_mhz = 1200.0,
279 				.dcfclk_mhz = 1200.0,
334 				.dcfclk_mhz = 560.0,
345 				.dcfclk_mhz = 694.0,
356 				.dcfclk_mhz = 875.0,
367 				.dcfclk_mhz = 1000.0,
378 				.dcfclk_mhz = 1200.0,
390 				.dcfclk_mhz = 1200.0,
445 			.dcfclk_mhz = 560.0,
456 			.dcfclk_mhz = 694.0,
467 			.dcfclk_mhz = 875.0,
478 			.dcfclk_mhz = 1000.0,
489 			.dcfclk_mhz = 1200.0,
500 			.dcfclk_mhz = 1200.0,
626 				.dcfclk_mhz = 400.0,
637 				.dcfclk_mhz = 464.52,
648 				.dcfclk_mhz = 514.29,
659 				.dcfclk_mhz = 576.00,
670 				.dcfclk_mhz = 626.09,
681 				.dcfclk_mhz = 685.71,
692 				.dcfclk_mhz = 757.89,
703 				.dcfclk_mhz = 847.06,
715 				.dcfclk_mhz = 847.06,
1783 	pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].dcfclk_mhz;  in dcn20_calculate_wm()
1789 		pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[1].dcfclk_mhz;  in dcn20_calculate_wm()
1803 		pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[2].dcfclk_mhz;  in dcn20_calculate_wm()
1816 		pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[2].dcfclk_mhz;  in dcn20_calculate_wm()
1828 	pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].dcfclk_mhz;  in dcn20_calculate_wm()
1882 …bb->clock_limits[i].dcfclk_mhz = (bb->clock_limits[i].fabricclk_mhz > max_clocks->dcfClockInKhz / …  in dcn20_update_bounding_box()
1896 	bb->clock_limits[num_calculated_states - 1].dcfclk_mhz = max_clocks->dcfClockInKhz / 1000;  in dcn20_update_bounding_box()
1914 		if ((bb->clock_limits[i].dcfclk_mhz > (max_clocks.dcfClockInKhz / 1000))  in dcn20_cap_soc_clocks()
1916 			bb->clock_limits[i].dcfclk_mhz = (max_clocks.dcfClockInKhz / 1000);  in dcn20_cap_soc_clocks()
1951 		if (bb->clock_limits[i-1].dcfclk_mhz != bb->clock_limits[i].dcfclk_mhz)  in dcn20_cap_soc_clocks()
2212 	pipes[0].clks_cfg.dcfclk_mhz = dml->soc.clock_limits[vlevel].dcfclk_mhz;  in calculate_wm_set_for_vlevel()
2378 	low_pstate_lvl.dcfclk_mhz = clk_table->entries[0].dcfclk_mhz;  in construct_low_pstate_lvl()
2420 			if ((unsigned int) dcn2_1_soc.clock_limits[j].dcfclk_mhz <= clk_table->entries[i].dcfclk_mhz) {  in dcn21_update_bw_bounding_box()
2431 		s[k].dcfclk_mhz = clk_table->entries[i].dcfclk_mhz;  in dcn21_update_bw_bounding_box()