Lines Matching defs:id
119 #define SRI(reg_name, block, id)\ argument
123 #define SRI2(reg_name, block, id)\ argument
127 #define SRIR(var_name, reg_name, block, id)\ argument
131 #define SRII(reg_name, block, id)\ argument
135 #define SRII_MPC_RMU(reg_name, block, id)\ argument
139 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
143 #define SF_DWB2(reg_name, block, id, field_name, post_fix) \ argument
146 #define DCCG_SRII(reg_name, block, id)\ argument
150 #define VUPDATE_SRII(reg_name, block, id)\ argument
215 #define abm_regs(id)\ argument
239 #define audio_regs(id)\ argument
267 #define vpg_regs(id)\ argument
290 #define afmt_regs(id)\ argument
313 #define stream_enc_regs(id)\ argument
336 #define aux_regs(id)\ argument
350 #define hpd_regs(id)\ argument
364 #define link_regs(id, phyid)\ argument
412 #define dpp_regs(id)\ argument
434 #define opp_regs(id)\ argument
456 #define aux_engine_regs(id)\ argument
473 #define dwbc_regs_dcn3(id)\ argument
490 #define mcif_wb_regs_dcn3(id)\ argument
507 #define dsc_regsDCN20(id)\ argument
557 #define optc_regs(id)\ argument
578 #define hubp_regs(id)\ argument
635 #define vmid_regs(id)\ argument
801 #define i2c_inst_regs(id) { I2C_HW_ENGINE_COMMON_REG_LIST_DCN30(id) } argument
1296 enum clock_source_id id, in dcn30_clock_source_create()