Lines Matching defs:id
105 #define SRI(reg_name, block, id)\ argument
109 #define SRIR(var_name, reg_name, block, id)\ argument
113 #define SRII(reg_name, block, id)\ argument
117 #define DCCG_SRII(reg_name, block, id)\ argument
121 #define VUPDATE_SRII(reg_name, block, id)\ argument
197 #define audio_regs(id)\ argument
236 #define opp_regs(id)\ argument
258 #define tg_regs(id)\ argument
300 #define hubp_regs(id)\ argument
333 #define vmid_regs(id)\ argument
365 #define dsc_regsDCN20(id)\ argument
387 #define ipp_regs(id)\ argument
407 #define opp_regs(id)\ argument
413 #define aux_engine_regs(id)\ argument
429 #define tf_regs(id)\ argument
452 #define stream_enc_regs(id)\ argument
538 #define i2c_inst_regs(id) { I2C_HW_ENGINE_COMMON_REG_LIST(id) } argument
974 enum clock_source_id id, in dcn21_clock_source_create()
1221 #define link_regs(id, phyid)\ argument
1249 #define aux_regs(id)\ argument
1262 #define hpd_regs(id)\ argument