Lines Matching defs:id
255 #define SRI(reg_name, block, id)\ argument
259 #define SRIR(var_name, reg_name, block, id)\ argument
263 #define SRII(reg_name, block, id)\ argument
267 #define SRI_IX(reg_name, block, id)\ argument
270 #define DCCG_SRII(reg_name, block, id)\ argument
274 #define VUPDATE_SRII(reg_name, block, id)\ argument
323 #define audio_regs(id)\ argument
346 #define stream_enc_regs(id)\ argument
372 #define aux_regs(id)\ argument
382 #define hpd_regs(id)\ argument
392 #define link_regs(id, phyid)\ argument
414 #define ipp_regs(id)\ argument
434 #define opp_regs(id)\ argument
452 #define aux_engine_regs(id)\ argument
463 #define tf_regs(id)\ argument
501 #define tg_regs_dcn201(id)\ argument
517 #define hubp_regsDCN201(id)\ argument
692 #define i2c_inst_regs(id) { I2C_HW_ENGINE_COMMON_REG_LIST(id) } argument
815 enum clock_source_id id, in dcn201_clock_source_create()