Lines Matching refs:clock_delay_div_4

77 	uint16_t clock_delay_div_4)  in wait_for_scl_high_sw()  argument
80 uint32_t scl_retry_max = I2C_SW_TIMEOUT_DELAY / clock_delay_div_4; in wait_for_scl_high_sw()
82 udelay(clock_delay_div_4); in wait_for_scl_high_sw()
88 udelay(clock_delay_div_4); in wait_for_scl_high_sw()
98 uint16_t clock_delay_div_4, in write_byte_sw() argument
107 udelay(clock_delay_div_4); in write_byte_sw()
111 udelay(clock_delay_div_4); in write_byte_sw()
115 if (!wait_for_scl_high_sw(ctx, ddc_handle, clock_delay_div_4)) in write_byte_sw()
128 udelay(clock_delay_div_4); in write_byte_sw()
132 udelay(clock_delay_div_4); in write_byte_sw()
136 if (!wait_for_scl_high_sw(ctx, ddc_handle, clock_delay_div_4)) in write_byte_sw()
143 udelay(clock_delay_div_4 << 1); in write_byte_sw()
147 udelay(clock_delay_div_4 << 1); in write_byte_sw()
155 uint16_t clock_delay_div_4, in read_byte_sw() argument
170 if (!wait_for_scl_high_sw(ctx, ddc_handle, clock_delay_div_4)) in read_byte_sw()
178 udelay(clock_delay_div_4 << 1); in read_byte_sw()
187 udelay(clock_delay_div_4); in read_byte_sw()
195 udelay(clock_delay_div_4); in read_byte_sw()
199 if (!wait_for_scl_high_sw(ctx, ddc_handle, clock_delay_div_4)) in read_byte_sw()
204 udelay(clock_delay_div_4); in read_byte_sw()
208 udelay(clock_delay_div_4); in read_byte_sw()
215 uint16_t clock_delay_div_4) in stop_sync_sw() argument
225 udelay(clock_delay_div_4); in stop_sync_sw()
229 udelay(clock_delay_div_4); in stop_sync_sw()
233 if (!wait_for_scl_high_sw(ctx, ddc_handle, clock_delay_div_4)) in stop_sync_sw()
239 udelay(clock_delay_div_4); in stop_sync_sw()
252 uint16_t clock_delay_div_4, in i2c_write_sw() argument
259 if (!write_byte_sw(ctx, ddc_handle, clock_delay_div_4, address)) in i2c_write_sw()
263 if (!write_byte_sw(ctx, ddc_handle, clock_delay_div_4, data[i])) in i2c_write_sw()
274 uint16_t clock_delay_div_4, in i2c_read_sw() argument
281 if (!write_byte_sw(ctx, ddc_handle, clock_delay_div_4, address)) in i2c_read_sw()
285 if (!read_byte_sw(ctx, ddc_handle, clock_delay_div_4, data + i, in i2c_read_sw()
299 uint16_t clock_delay_div_4) in start_sync_sw() argument
309 udelay(clock_delay_div_4); in start_sync_sw()
319 udelay(clock_delay_div_4); in start_sync_sw()
323 if (!wait_for_scl_high_sw(ctx, ddc_handle, clock_delay_div_4)) in start_sync_sw()
328 udelay(clock_delay_div_4); in start_sync_sw()
332 udelay(clock_delay_div_4); in start_sync_sw()
400 uint16_t clock_delay_div_4 = engine->clock_delay >> 2; in dce_i2c_sw_engine_submit_channel_request() local
404 bool result = start_sync_sw(engine->ctx, ddc, clock_delay_div_4); in dce_i2c_sw_engine_submit_channel_request()
412 result = i2c_write_sw(engine->ctx, ddc, clock_delay_div_4, in dce_i2c_sw_engine_submit_channel_request()
417 result = i2c_read_sw(engine->ctx, ddc, clock_delay_div_4, in dce_i2c_sw_engine_submit_channel_request()
431 if (!stop_sync_sw(engine->ctx, ddc, clock_delay_div_4)) in dce_i2c_sw_engine_submit_channel_request()