display/dc/dc.h

2  * Copyright 2012-2023 Advanced Micro Devices, Inc.
99 	// for example, 1080p -> 8K is 4.0, or 4000 raw value
107 	// for example, 8K -> 1080p is 0.25, or 250 raw value
119  * DOC: color-management-caps
124  * abstracted HW. DCE 5-12 had almost no important changes, but starting with
131  * struct rom_curve_caps - predefined transfer function caps for degamma and regamma
147  * struct dpp_color_caps - color pipeline capabilities for display pipe and
152  * just plain 256-entry lookup
161  * @dgam_rom_for_yuv: pre-defined degamma LUT for YUV planes
162  * @dgam_rom_caps: pre-definied curve caps for degamma 1D LUT
163  * @ogam_rom_caps: pre-definied curve caps for regamma 1D LUT
183  * struct mpc_color_caps - color pipeline capabilities for multiple pipe and
192  * @ogam_rom_caps: pre-definied curve caps for regamma 1D LUT
204  * struct dc_color_caps - color pipes capabilities for DPP and MPC hw blocks
350  * re-programming however do not affect bandwidth consumption or clock
463  * enum pipe_split_policy - Pipe split strategy supported by DCN
471 	 * pipe in order to bring the best trade-off between performance and
503 	DCN_PWR_STATE_UNKNOWN = -1,
518  * struct dc_clocks - DC pipe clocks
586 		unsigned long long start_tick = dc->debug.bw_val_profile.enable ? \
587 				dm_get_timestamp(dc->ctx) : 0
590 		if (dc->debug.bw_val_profile.enable) \
591 			dc->debug.bw_val_profile.total_count++
594 		if (dc->debug.bw_val_profile.enable) { \
596 				voltage_level_tick = dm_get_timestamp(dc->ctx); \
597 			dc->debug.bw_val_profile.skip_ ## status ## _count++; \
601 		if (dc->debug.bw_val_profile.enable) \
602 			voltage_level_tick = dm_get_timestamp(dc->ctx)
605 		if (dc->debug.bw_val_profile.enable) \
606 			watermark_tick = dm_get_timestamp(dc->ctx)
609 		if (dc->debug.bw_val_profile.enable) { \
610 			end_tick = dm_get_timestamp(dc->ctx); \
611 			dc->debug.bw_val_profile.total_ticks += end_tick - start_tick; \
612 			dc->debug.bw_val_profile.voltage_level_ticks += voltage_level_tick - start_tick; \
614 				dc->debug.bw_val_profile.watermark_ticks += watermark_tick - voltage_level_tick; \
615 				dc->debug.bw_val_profile.rq_dlg_ticks += end_tick - watermark_tick; \
666  * 15-2: reserved
667  * 31-16: timeout in ms
740  * struct dc_debug_options - DC debug struct
847 	/* TODO - remove once tested */
858 	/* Enable dmub aux for legacy ddc */
1346  * struct dc_validation_set - Struct to store surface/stream associations for validation
1433  * return - minimum required timing bandwidth in kbps.
1442  * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
1512 	struct ddc_service *ddc;  member
1607  * to establish a proper connection between TX and RX. So it is always
1610  * in place based on latest RX capabilities. The function may also cause dpms
1614  * @reason - Indicate which event triggers this detection. dc may customize
1616  * return false - if detection is not fully completed. This could happen when
1619  * link->connection_type == dc_connection_mst_branch when returning false).
1620  * return true - detection is completed, link has been fully updated with latest
1632  * @dc_link - link the remote sink will be added to.
1633  * @edid - byte array of EDID raw data.
1634  * @len - size of the edid in byte
1635  * @init_data -
1644  * @link - link the sink should be removed from
1645  * @sink - sink to be removed.
1659  * @type - dc_connection_single if connected, dc_connection_none otherwise.
1660  * return - false if an unexpected error occurs, true otherwise.
1671  * return - true HPD is asserted (HPD high), false otherwise (HPD low)
1681  * @link - The link the HPD pin is associated with.
1682  * @enable = true - enable hardware HPD filter. HPD event will only queued to irq
1689  * @enable = false - disable hardware HPD filter. HPD event will be queued
1695 /* submit i2c read/write payloads through ddc channel
1696  * @link_index - index to a link with ddc in i2c mode
1697  * @cmd - i2c command structure
1698  * return - true if success, false otherwise.
1706  * @link_index - index to a link with ddc in i2c mode
1707  * @cmd - i2c command structure
1708  * return - true if success, false otherwise.
1716  * retries or handle error states. The reply is returned in the payload->reply
1718  * transferred,or -1 on a failure.
1720 int dc_link_aux_transfer_raw(struct ddc_service *ddc,
1733 /* Notify DC about DP RX Interrupt (aka DP IRQ_HPD).
1735  * TODO - When defer_handling is true the function will have a different purpose.
1736  * It no longer does complete hpd rx irq handling. We should create a separate
1740  * true - Downstream port status changed. DM should call DC to do the
1742  * false - no change in Downstream port status. No further action required
1751 /* handle DP Link loss sequence and try to recover RX link loss with best
1756 /* Determine if hpd rx irq should be handled or ignored
1757  * return true - hpd rx irq should be handled.
1758  * return false - it is safe to ignore hpd rx irq event
1763  * @link - link the hpd irq data associated with
1764  * @hpd_irq_dpcd_data - input hpd irq data
1765  * return - true if hpd irq data indicates a link lost
1770 /* Read hpd rx irq data from a given link
1771  * @link - link where the hpd irq data should be read from
1772  * @irq_data - output hpd irq data
1773  * return - DC_OK if hpd irq data is read successfully, otherwise hpd irq data
1780 /* The function clears recorded DP RX states in the link. DM should call this
1783  * TODO - in the future we should consider to expand link resume interface to
1784  * support clearing previous rx states. So we don't have to rely on dm to call
1798  * return - total effective link bandwidth in kbps.
1838  * interface i.e stream_update->dsc_config
1846  * @link - current detected link
1847  * @req_bw - requested bandwidth in kbps
1848  * @link_settings - returned most optimal link settings that can fit the
1850  * return - false if link can't support requested bandwidth, true if link
1858  * connected RX device and its capability
1866  * @link -  a link with DP RX connection
1867  * return - if stream is committed to this link with MST signal type, type of
1874  * TX/RX/Cable capabilities and dp override policies.
1876  * @link - a link with DP RX connection
1877  * return - max dp link settings the link can enable.
1885  * @link - a link with DP RX connection
1886  * return - highest encoding format link supports.
1890 /* Check if a RX (ex. DP sink, MST hub, passive or active dongle) is connected
1892  * @link - a link with dp connector signal type
1893  * return - true if connected, false otherwise
1897 /* Force DP lane settings update to main-link video signal and notify the change
1898  * to DP RX via DPCD. This is a debug interface used for video signal integrity
1902  * @lt_settings - a container structure with desired hw_lane_settings
1909  * test or debugging purpose. The test pattern will remain until next un-plug.
1911  * @link - active link with DP signal output enabled.
1912  * @test_pattern - desired test pattern to output.
1914  * @test_pattern_color_space - for video test pattern choose a desired color
1916  * @p_link_settings - For PHY pattern choose a desired link settings
1917  * @p_custom_pattern - some test pattern will require a custom input to
1919  * @cust_pattern_size - size of the custom pattern input.
1944  * @link_settings - if not NULL, force preferred link settings to the link.
1945  * @lt_override - a set of override pointers. If any pointer is none NULL, dc
1957 /* return - true if FEC is supported with connected DP RX, false otherwise */
1962  * return - true if FEC should be enabled, false otherwise.
1972 /* Force DP RX to update its power state.
1973  * NOTE: this interface doesn't update dp main-link. Calling this function will
1974  * cause DP TX main-link and DP RX power states out of sync. DM has to restore
1975  * RX power state back upon finish DM specific execution requiring DP RX in a
1977  * @on - true to set DP RX in D0 power state, false to set DP RX in D3 power
1982 /* Force link to read base dp receiver caps from dpcd 000h - 00Fh and overwrite
1983  * current value read from extended receiver cap from 02200h - 0220Fh.
1984  * Some DP RX has problems of providing accurate DP receiver caps from extended
2001 /* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
2033  * return - true if trace is initialized and has valid data. False dp trace
2054  * @in_detection - true to get link training end time stamp of last link
2062  * @in_detection - true to get link training count of last link
2076  * Send a request from DP-Tx requesting to allocate BW remotely after
2103  * Unplug => de-allocate bw
2126 /* Sink Interfaces - A sink corresponds to a display output device */
2131 	// 8 byte port ID -> ELD.PortID
2133 	// 128bit GUID in binary formufacturer name -> ELD.ManufacturerName
2135 	// 2 byte product code -> ELD.ProductCode