Lines Matching refs:dcn32_smu_set_hard_min_by_freq

383 			dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DISPCLK, khz_to_mhz_ceil(temp_dispclk_khz));  in dcn32_update_clocks_update_dentist()
422 …dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DISPCLK, khz_to_mhz_ceil(clk_mgr->base.clks.dispclk_…  in dcn32_update_clocks_update_dentist()
516 …dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_kh…  in dcn32_update_clocks()
552 						dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, dc->clk_mgr->bw_params->max_memclk_mhz);  in dcn32_update_clocks()
554 						dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK,  in dcn32_update_clocks()
557 					dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, dc->clk_mgr->bw_params->max_memclk_mhz);  in dcn32_update_clocks()
593 …dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz…  in dcn32_update_clocks()
611 …dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DPPCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dppclk_kh…  in dcn32_update_clocks()
631 …dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DTBCLK, khz_to_mhz_ceil(new_clocks->ref_dtbclk_khz));  in dcn32_update_clocks()
641 …dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DPPCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dppclk_kh…  in dcn32_update_clocks()
815 			dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK,  in dcn32_set_hard_min_memclk()
818 			dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK,  in dcn32_set_hard_min_memclk()
821 		dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK,  in dcn32_set_hard_min_memclk()
938 	dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, memclk_mhz);  in dcn32_set_min_memclk()