Lines Matching refs:dcn30_smu_set_hard_min_by_freq

236 …dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCEFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_k…  in dcn3_update_clocks()
266 				dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK,  in dcn3_update_clocks()
269 				dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK,  in dcn3_update_clocks()
283 …dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz…  in dcn3_update_clocks()
290 …dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_PIXCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dppclk_kh…  in dcn3_update_clocks()
296 …dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DISPCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dispclk_…  in dcn3_update_clocks()
364 			dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK,  in dcn3_set_hard_min_memclk()
367 			dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK,  in dcn3_set_hard_min_memclk()
370 		dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK,  in dcn3_set_hard_min_memclk()
402 	dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, memclk_mhz);  in dcn3_set_min_memclk()
484 …dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_PHYCLK, khz_to_mhz_ceil(clk_mgr_base->clks.phyclk_kh…  in dcn30_notify_link_rate_change()