284 static void rn_dump_clk_registers_internal(struct rn_clk_internal *internal, struct clk_mgr *clk_mg…  in rn_dump_clk_registers_internal()  argument
288 	internal->CLK1_CLK3_CURRENT_CNT = REG_READ(CLK1_CLK3_CURRENT_CNT);  in rn_dump_clk_registers_internal()
289 	internal->CLK1_CLK3_BYPASS_CNTL = REG_READ(CLK1_CLK3_BYPASS_CNTL);  in rn_dump_clk_registers_internal()
291 	internal->CLK1_CLK3_DS_CNTL = REG_READ(CLK1_CLK3_DS_CNTL);	//dcf deep sleep divider  in rn_dump_clk_registers_internal()
292 	internal->CLK1_CLK3_ALLOW_DS = REG_READ(CLK1_CLK3_ALLOW_DS);  in rn_dump_clk_registers_internal()
294 	internal->CLK1_CLK1_CURRENT_CNT = REG_READ(CLK1_CLK1_CURRENT_CNT);  in rn_dump_clk_registers_internal()
295 	internal->CLK1_CLK1_BYPASS_CNTL = REG_READ(CLK1_CLK1_BYPASS_CNTL);  in rn_dump_clk_registers_internal()
297 	internal->CLK1_CLK2_CURRENT_CNT = REG_READ(CLK1_CLK2_CURRENT_CNT);  in rn_dump_clk_registers_internal()
298 	internal->CLK1_CLK2_BYPASS_CNTL = REG_READ(CLK1_CLK2_BYPASS_CNTL);  in rn_dump_clk_registers_internal()
300 	internal->CLK1_CLK0_CURRENT_CNT = REG_READ(CLK1_CLK0_CURRENT_CNT);  in rn_dump_clk_registers_internal()
301 	internal->CLK1_CLK0_BYPASS_CNTL = REG_READ(CLK1_CLK0_BYPASS_CNTL);  in rn_dump_clk_registers_internal()
308 	struct rn_clk_internal internal = {0};  in rn_dump_clk_registers()  local
313 	rn_dump_clk_registers_internal(&internal, clk_mgr_base);  in rn_dump_clk_registers()
315 	regs_and_bypass->dcfclk = internal.CLK1_CLK3_CURRENT_CNT / 10;  in rn_dump_clk_registers()
316 	regs_and_bypass->dcf_deep_sleep_divider = internal.CLK1_CLK3_DS_CNTL / 10;  in rn_dump_clk_registers()
317 	regs_and_bypass->dcf_deep_sleep_allow = internal.CLK1_CLK3_ALLOW_DS;  in rn_dump_clk_registers()
318 	regs_and_bypass->dprefclk = internal.CLK1_CLK2_CURRENT_CNT / 10;  in rn_dump_clk_registers()
319 	regs_and_bypass->dispclk = internal.CLK1_CLK0_CURRENT_CNT / 10;  in rn_dump_clk_registers()
320 	regs_and_bypass->dppclk = internal.CLK1_CLK1_CURRENT_CNT / 10;  in rn_dump_clk_registers()
322 	regs_and_bypass->dppclk_bypass = internal.CLK1_CLK1_BYPASS_CNTL & 0x0007;  in rn_dump_clk_registers()
325 	regs_and_bypass->dcfclk_bypass = internal.CLK1_CLK3_BYPASS_CNTL & 0x0007;  in rn_dump_clk_registers()
328 	regs_and_bypass->dispclk_bypass = internal.CLK1_CLK0_BYPASS_CNTL & 0x0007;  in rn_dump_clk_registers()
331 	regs_and_bypass->dprefclk_bypass = internal.CLK1_CLK2_BYPASS_CNTL & 0x0007;  in rn_dump_clk_registers()
377 				internal.CLK1_CLK3_CURRENT_CNT);  in rn_dump_clk_registers()
383 					internal.CLK1_CLK3_DS_CNTL);  in rn_dump_clk_registers()
389 					internal.CLK1_CLK3_ALLOW_DS);  in rn_dump_clk_registers()
395 					internal.CLK1_CLK2_CURRENT_CNT);  in rn_dump_clk_registers()
401 					internal.CLK1_CLK0_CURRENT_CNT);  in rn_dump_clk_registers()
407 					internal.CLK1_CLK1_CURRENT_CNT);  in rn_dump_clk_registers()
413 					internal.CLK1_CLK3_BYPASS_CNTL);  in rn_dump_clk_registers()
419 					internal.CLK1_CLK2_BYPASS_CNTL);  in rn_dump_clk_registers()
425 					internal.CLK1_CLK0_BYPASS_CNTL);  in rn_dump_clk_registers()
431 					internal.CLK1_CLK1_BYPASS_CNTL);  in rn_dump_clk_registers()