92 uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context)  in dce110_get_min_vblank_time_us()  argument
97 	for (j = 0; j < context->stream_count; j++) {  in dce110_get_min_vblank_time_us()
98 		struct dc_stream_state *stream = context->streams[j];  in dce110_get_min_vblank_time_us()
120 	const struct dc_state *context,  in dce110_fill_display_configs()  argument
126 	for (j = 0; j < context->stream_count; j++) {  in dce110_fill_display_configs()
129 		const struct dc_stream_state *stream = context->streams[j];  in dce110_fill_display_configs()
135 			if (stream == context->res_ctx.pipe_ctx[k].stream) {  in dce110_fill_display_configs()
136 				pipe_ctx = &context->res_ctx.pipe_ctx[k];  in dce110_fill_display_configs()
174 	struct dc_state *context)  in dce11_pplib_apply_display_requirements()  argument
176 	struct dm_pp_display_configuration *pp_display_cfg = &context->pp_display_cfg;  in dce11_pplib_apply_display_requirements()
183 		context->bw_ctx.bw.dce.all_displays_in_sync;  in dce11_pplib_apply_display_requirements()
185 			context->bw_ctx.bw.dce.nbp_state_change_enable == false;  in dce11_pplib_apply_display_requirements()
187 			context->bw_ctx.bw.dce.cpuc_state_change_enable == false;  in dce11_pplib_apply_display_requirements()
189 			context->bw_ctx.bw.dce.cpup_state_change_enable == false;  in dce11_pplib_apply_display_requirements()
191 			context->bw_ctx.bw.dce.blackout_recovery_time_us;  in dce11_pplib_apply_display_requirements()
199 	     ASICREV_IS_VEGA20_P(dc->ctx->asic_id.hw_internal_rev) && (context->stream_count >= 2)) {  in dce11_pplib_apply_display_requirements()
205 		pp_display_cfg->min_memory_clock_khz = context->bw_ctx.bw.dce.yclk_khz  in dce11_pplib_apply_display_requirements()
211 			context->bw_ctx.bw.dce.sclk_khz);  in dce11_pplib_apply_display_requirements()
220 	pp_display_cfg->min_dcfclock_khz = (context->stream_count > 4) ?  in dce11_pplib_apply_display_requirements()
224 			= context->bw_ctx.bw.dce.sclk_deep_sleep_khz;  in dce11_pplib_apply_display_requirements()
227 						dce110_get_min_vblank_time_us(context);  in dce11_pplib_apply_display_requirements()
233 	dce110_fill_display_configs(context, pp_display_cfg);  in dce11_pplib_apply_display_requirements()
238 			&context->streams[0]->timing;  in dce11_pplib_apply_display_requirements()
250 			struct dc_state *context,  in dce11_update_clocks()  argument
255 	int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz;  in dce11_update_clocks()
261 	level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context);  in dce11_update_clocks()
270 		context->bw_ctx.bw.dce.dispclk_khz = dce_set_clock(clk_mgr_base, patched_disp_clk);  in dce11_update_clocks()
273 	dce11_pplib_apply_display_requirements(clk_mgr_base->ctx->dc, context);  in dce11_update_clocks()