Lines Matching refs:RREG32_PCIE
1110 orig = data = RREG32_PCIE(ixPCIE_LC_CNTL); in vi_enable_aspm()
1134 orig = data = RREG32_PCIE(ixPCIE_LC_CNTL); in vi_program_aspm()
1141 orig = data = RREG32_PCIE(ixPCIE_LC_N_FTS_CNTL); in vi_program_aspm()
1148 orig = data = RREG32_PCIE(ixPCIE_LC_CNTL3); in vi_program_aspm()
1153 orig = data = RREG32_PCIE(ixPCIE_P_CNTL); in vi_program_aspm()
1158 data = RREG32_PCIE(ixPCIE_LC_L1_PM_SUBSTATE); in vi_program_aspm()
1173 orig = data = RREG32_PCIE(ixPCIE_LC_CNTL6); in vi_program_aspm()
1178 orig = data = RREG32_PCIE(ixPCIE_LC_LINK_WIDTH_CNTL); in vi_program_aspm()
1220 orig = data = RREG32_PCIE(ixCPM_CONTROL); in vi_program_aspm()
1226 orig = data = RREG32_PCIE(ixPCIE_CONFIG_CNTL); in vi_program_aspm()
1237 orig = data = RREG32_PCIE(ixPCIE_LC_CNTL7); in vi_program_aspm()
1242 orig = data = RREG32_PCIE(ixPCIE_HW_DEBUG); in vi_program_aspm()
1247 orig = data = RREG32_PCIE(ixPCIE_LC_CNTL2); in vi_program_aspm()
1259 data = RREG32_PCIE(ixPCIE_LC_N_FTS_CNTL); in vi_program_aspm()
1260 data1 = RREG32_PCIE(ixPCIE_LC_STATUS1); in vi_program_aspm()
1264 orig = data = RREG32_PCIE(ixPCIE_LC_CNTL); in vi_program_aspm()
1273 orig = data = RREG32_PCIE(ixPCIE_LC_TRAINING_CNTL); in vi_program_aspm()
1391 tmp = RREG32_PCIE(ixPCIE_PERF_CNTL_TXCLK); in vi_get_pcie_usage()
1396 *count0 = RREG32_PCIE(ixPCIE_PERF_COUNT0_TXCLK) | (cnt0_of << 32); in vi_get_pcie_usage()
1397 *count1 = RREG32_PCIE(ixPCIE_PERF_COUNT1_TXCLK) | (cnt1_of << 32); in vi_get_pcie_usage()
1405 nak_r = RREG32_PCIE(ixPCIE_RX_NUM_NAK); in vi_get_pcie_replay_count()
1406 nak_g = RREG32_PCIE(ixPCIE_RX_NUM_NAK_GENERATED); in vi_get_pcie_replay_count()
1769 temp = data = RREG32_PCIE(ixPCIE_CNTL2); in vi_update_bif_medium_grain_light_sleep()
2026 data = RREG32_PCIE(ixPCIE_CNTL2); in vi_common_get_clockgating_state()