276 	      RREG32_SOC15(VCN, 0, mmUVD_STATUS)))  in vcn_v2_0_hw_fini()
498 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v2_0_disable_clock_gating()
505 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v2_0_disable_clock_gating()
507 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_GATE);  in vcn_v2_0_disable_clock_gating()
528 	WREG32_SOC15(VCN, 0, mmUVD_CGC_GATE, data);  in vcn_v2_0_disable_clock_gating()
530 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v2_0_disable_clock_gating()
551 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v2_0_disable_clock_gating()
554 	data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE);  in vcn_v2_0_disable_clock_gating()
579 	WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE, data);  in vcn_v2_0_disable_clock_gating()
581 	data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL);  in vcn_v2_0_disable_clock_gating()
592 	WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data);  in vcn_v2_0_disable_clock_gating()
658 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v2_0_enable_clock_gating()
665 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v2_0_enable_clock_gating()
667 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v2_0_enable_clock_gating()
688 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v2_0_enable_clock_gating()
690 	data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL);  in vcn_v2_0_enable_clock_gating()
701 	WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data);  in vcn_v2_0_enable_clock_gating()
723 		WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);  in vcn_v2_0_disable_static_power_gating()
724 		SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS,  in vcn_v2_0_disable_static_power_gating()
737 		WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);  in vcn_v2_0_disable_static_power_gating()
738 		SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, 0,  0xFFFFF);  in vcn_v2_0_disable_static_power_gating()
744 	data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS);  in vcn_v2_0_disable_static_power_gating()
750 	WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);  in vcn_v2_0_disable_static_power_gating()
762 		data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS);  in vcn_v2_0_enable_static_power_gating()
765 		WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);  in vcn_v2_0_enable_static_power_gating()
779 		WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);  in vcn_v2_0_enable_static_power_gating()
791 		SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, data, 0xFFFFF);  in vcn_v2_0_enable_static_power_gating()
973 	WREG32_SOC15(VCN, 0, mmUVD_MPC_CNTL, tmp);  in vcn_v2_0_start()
1005 	tmp = RREG32_SOC15(VCN, 0, mmUVD_SOFT_RESET);  in vcn_v2_0_start()
1008 	WREG32_SOC15(VCN, 0, mmUVD_SOFT_RESET, tmp);  in vcn_v2_0_start()
1146 	r = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_STATUS, UVD_STATUS__IDLE, 0x7);  in vcn_v2_0_stop()
1154 	r = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_LMI_STATUS, tmp, tmp);  in vcn_v2_0_stop()
1159 	tmp = RREG32_SOC15(VCN, 0, mmUVD_LMI_CTRL2);  in vcn_v2_0_stop()
1161 	WREG32_SOC15(VCN, 0, mmUVD_LMI_CTRL2, tmp);  in vcn_v2_0_stop()
1165 	r = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_LMI_STATUS, tmp, tmp);  in vcn_v2_0_stop()
1189 	WREG32_SOC15(VCN, 0, mmUVD_STATUS, 0);  in vcn_v2_0_stop()
1282 	return (RREG32_SOC15(VCN, 0, mmUVD_STATUS) == UVD_STATUS__IDLE);  in vcn_v2_0_is_idle()
1290 	ret = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_STATUS, UVD_STATUS__IDLE,  in vcn_v2_0_wait_for_idle()