Lines Matching +full:0 +full:x80000000
46 #define smnMP1_FIRMWARE_FLAGS 0x3010024
52 int err = 0; in psp_v12_0_init_microcode()
67 adev->psp.securedisplay_context.context.bin_desc.size_bytes = 0; in psp_v12_0_init_microcode()
69 return 0; in psp_v12_0_init_microcode()
75 uint32_t psp_gfxdrv_command_reg = 0; in psp_v12_0_bootloader_load_sysdrv()
82 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v12_0_bootloader_load_sysdrv()
84 return 0; in psp_v12_0_bootloader_load_sysdrv()
87 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35), in psp_v12_0_bootloader_load_sysdrv()
88 0x80000000, 0x80000000, false); in psp_v12_0_bootloader_load_sysdrv()
96 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v12_0_bootloader_load_sysdrv()
99 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v12_0_bootloader_load_sysdrv()
105 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35), in psp_v12_0_bootloader_load_sysdrv()
106 0x80000000, 0x80000000, false); in psp_v12_0_bootloader_load_sysdrv()
114 unsigned int psp_gfxdrv_command_reg = 0; in psp_v12_0_bootloader_load_sos()
121 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v12_0_bootloader_load_sos()
123 return 0; in psp_v12_0_bootloader_load_sos()
126 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35), in psp_v12_0_bootloader_load_sos()
127 0x80000000, 0x80000000, false); in psp_v12_0_bootloader_load_sos()
135 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v12_0_bootloader_load_sos()
138 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v12_0_bootloader_load_sos()
143 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v12_0_bootloader_load_sos()
144 RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v12_0_bootloader_load_sos()
145 0, true); in psp_v12_0_bootloader_load_sos()
156 tmp = REG_SET_FIELD(0, IH_CLIENT_CFG_DATA, CREDIT_RETURN_ADDR, 0x1244b); in psp_v12_0_reroute_ih()
160 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 3); in psp_v12_0_reroute_ih()
161 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v12_0_reroute_ih()
162 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v12_0_reroute_ih()
165 psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v12_0_reroute_ih()
166 0x80000000, 0x8000FFFF, false); in psp_v12_0_reroute_ih()
169 tmp = REG_SET_FIELD(0, IH_CLIENT_CFG_DATA, CREDIT_RETURN_ADDR, 0x1216b); in psp_v12_0_reroute_ih()
172 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 4); in psp_v12_0_reroute_ih()
173 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v12_0_reroute_ih()
174 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v12_0_reroute_ih()
177 psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v12_0_reroute_ih()
178 0x80000000, 0x8000FFFF, false); in psp_v12_0_reroute_ih()
184 int ret = 0; in psp_v12_0_ring_create()
185 unsigned int psp_ring_reg = 0; in psp_v12_0_ring_create()
194 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg); in psp_v12_0_ring_create()
197 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_103, psp_ring_reg); in psp_v12_0_ring_create()
200 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, in psp_v12_0_ring_create()
207 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_101), in psp_v12_0_ring_create()
208 0x80000000, 0x8000FFFF, false); in psp_v12_0_ring_create()
213 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg); in psp_v12_0_ring_create()
216 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, psp_ring_reg); in psp_v12_0_ring_create()
219 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, psp_ring_reg); in psp_v12_0_ring_create()
223 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); in psp_v12_0_ring_create()
229 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v12_0_ring_create()
230 0x80000000, 0x8000FFFF, false); in psp_v12_0_ring_create()
239 int ret = 0; in psp_v12_0_ring_stop()
244 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, in psp_v12_0_ring_stop()
247 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, in psp_v12_0_ring_stop()
255 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_101), in psp_v12_0_ring_stop()
256 0x80000000, 0x80000000, false); in psp_v12_0_ring_stop()
258 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v12_0_ring_stop()
259 0x80000000, 0x80000000, false); in psp_v12_0_ring_stop()
267 int ret = 0; in psp_v12_0_ring_destroy()
288 offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64); in psp_v12_0_mode1_reset()
290 ret = psp_wait_for(psp, offset, 0x80000000, 0x8000FFFF, false); in psp_v12_0_mode1_reset()
302 offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_33); in psp_v12_0_mode1_reset()
304 ret = psp_wait_for(psp, offset, 0x80000000, 0x80000000, false); in psp_v12_0_mode1_reset()
313 return 0; in psp_v12_0_mode1_reset()
322 data = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102); in psp_v12_0_ring_get_wptr()
324 data = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67); in psp_v12_0_ring_get_wptr()
334 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, value); in psp_v12_0_ring_set_wptr()
335 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, GFX_CTRL_CMD_ID_CONSUME_CMD); in psp_v12_0_ring_set_wptr()
337 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67, value); in psp_v12_0_ring_set_wptr()