74 static u32 gfx_v6_0_get_csb_size(struct amdgpu_device *adev);
75 static void gfx_v6_0_get_csb_buffer(struct amdgpu_device *adev, volatile u32 *buffer);
89 static const u32 verde_rlc_save_restore_register_list[] =
385 	const u32 num_tile_mode_states = ARRAY_SIZE(adev->gfx.config.tile_mode_array);  in gfx_v6_0_tiling_mode_table_init()
386 	u32 reg_offset, split_equal_to_row_size, *tilemode;  in gfx_v6_0_tiling_mode_table_init()
1287 static void gfx_v6_0_select_se_sh(struct amdgpu_device *adev, u32 se_num,  in gfx_v6_0_select_se_sh()
1288 				  u32 sh_num, u32 instance, int xcc_id)  in gfx_v6_0_select_se_sh()
1290 	u32 data;  in gfx_v6_0_select_se_sh()
1312 static u32 gfx_v6_0_get_rb_active_bitmap(struct amdgpu_device *adev)  in gfx_v6_0_get_rb_active_bitmap()
1314 	u32 data, mask;  in gfx_v6_0_get_rb_active_bitmap()
1327 static void gfx_v6_0_raster_config(struct amdgpu_device *adev, u32 *rconf)  in gfx_v6_0_raster_config()
1360 						    u32 raster_config, unsigned rb_mask,  in gfx_v6_0_write_harvested_raster_configs()
1452 	u32 data;  in gfx_v6_0_setup_rb()
1453 	u32 raster_config = 0;  in gfx_v6_0_setup_rb()
1454 	u32 active_rbs = 0;  in gfx_v6_0_setup_rb()
1455 	u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se /  in gfx_v6_0_setup_rb()
1504 						 u32 bitmap)  in gfx_v6_0_set_user_cu_inactive_bitmap()
1506 	u32 data;  in gfx_v6_0_set_user_cu_inactive_bitmap()
1517 static u32 gfx_v6_0_get_cu_enabled(struct amdgpu_device *adev)  in gfx_v6_0_get_cu_enabled()
1519 	u32 data, mask;  in gfx_v6_0_get_cu_enabled()
1532 	u32 data, mask;  in gfx_v6_0_setup_spi()
1533 	u32 active_cu = 0;  in gfx_v6_0_setup_spi()
1564 	u32 gb_addr_config = 0;  in gfx_v6_0_constants_init()
1565 	u32 mc_arb_ramcfg;  in gfx_v6_0_constants_init()
1566 	u32 sx_debug_1;  in gfx_v6_0_constants_init()
1567 	u32 hdp_host_path_cntl;  in gfx_v6_0_constants_init()
1568 	u32 tmp;  in gfx_v6_0_constants_init()
1838 	u32 header, control = 0;  in gfx_v6_0_ring_emit_ib()
1935 	u32 fw_size;  in gfx_v6_0_cp_gfx_load_microcode()
2051 	u32 tmp;  in gfx_v6_0_cp_gfx_resume()
2052 	u32 rb_bufsz;  in gfx_v6_0_cp_gfx_resume()
2148 	u32 tmp;  in gfx_v6_0_cp_compute_resume()
2149 	u32 rb_bufsz;  in gfx_v6_0_cp_compute_resume()
2218 	u32 tmp = RREG32(mmCP_INT_CNTL_RING0);  in gfx_v6_0_enable_gui_idle_interrupt()
2219 	u32 mask;  in gfx_v6_0_enable_gui_idle_interrupt()
2335 	const u32 *src_ptr;  in gfx_v6_0_rlc_init()
2336 	volatile u32 *dst_ptr;  in gfx_v6_0_rlc_init()
2337 	u32 dws;  in gfx_v6_0_rlc_init()
2344 			(u32)ARRAY_SIZE(verde_rlc_save_restore_register_list);  in gfx_v6_0_rlc_init()
2416 static void gfx_v6_0_update_rlc(struct amdgpu_device *adev, u32 rlc)  in gfx_v6_0_update_rlc()
2418 	u32 tmp;  in gfx_v6_0_update_rlc()
2425 static u32 gfx_v6_0_halt_rlc(struct amdgpu_device *adev)  in gfx_v6_0_halt_rlc()
2427 	u32 data, orig;  in gfx_v6_0_halt_rlc()
2468 	u32 tmp;  in gfx_v6_0_lbpw_supported()
2483 	u32 i;  in gfx_v6_0_rlc_resume()
2486 	u32 fw_size;  in gfx_v6_0_rlc_resume()
2528 	u32 data, orig, tmp;  in gfx_v6_0_enable_cgcg()
2568 	u32 data, orig, tmp = 0;  in gfx_v6_0_enable_mgcg()
2648 	u32 data, orig;  in gfx_v6_0_enable_cp_pg()
2745 	u32 tmp;  in gfx_v6_0_init_ao_cu_mask()
2758 	u32 data, orig;  in gfx_v6_0_enable_gfx_static_mgpg()
2772 	u32 data, orig;  in gfx_v6_0_enable_gfx_dynamic_mgpg()
2785 	u32 tmp;  in gfx_v6_0_init_gfx_cgpg()
2805 static u32 gfx_v6_0_get_csb_size(struct amdgpu_device *adev)  in gfx_v6_0_get_csb_size()
2807 	u32 count = 0;  in gfx_v6_0_get_csb_size()
2838 				    volatile u32 *buffer)  in gfx_v6_0_get_csb_buffer()
2840 	u32 count = 0, i;  in gfx_v6_0_get_csb_buffer()
3006 				  u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id)  in gfx_v6_0_select_me_pipe_q()
3202 	u32 cp_int_cntl;  in gfx_v6_0_set_gfx_eop_interrupt_state()
3224 	u32 cp_int_cntl;  in gfx_v6_0_set_compute_eop_interrupt_state()
3265 	u32 cp_int_cntl;  in gfx_v6_0_set_priv_reg_fault_state()
3290 	u32 cp_int_cntl;  in gfx_v6_0_set_priv_inst_fault_state()
3555 	u32 mask, bitmap, ao_bitmap, ao_cu_mask = 0;  in gfx_v6_0_get_cu_info()
3558 	u32 ao_cu_num;  in gfx_v6_0_get_cu_info()