2886 	u32 reg_block, lb_interrupt_mask;  in dce_v8_0_set_crtc_vblank_interrupt_state()  local
2919 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block);  in dce_v8_0_set_crtc_vblank_interrupt_state()
2920 		lb_interrupt_mask &= ~LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK;  in dce_v8_0_set_crtc_vblank_interrupt_state()
2921 		WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);  in dce_v8_0_set_crtc_vblank_interrupt_state()
2924 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block);  in dce_v8_0_set_crtc_vblank_interrupt_state()
2925 		lb_interrupt_mask |= LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK;  in dce_v8_0_set_crtc_vblank_interrupt_state()
2926 		WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);  in dce_v8_0_set_crtc_vblank_interrupt_state()
2937 	u32 reg_block, lb_interrupt_mask;  in dce_v8_0_set_crtc_vline_interrupt_state()  local
2970 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block);  in dce_v8_0_set_crtc_vline_interrupt_state()
2971 		lb_interrupt_mask &= ~LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK_MASK;  in dce_v8_0_set_crtc_vline_interrupt_state()
2972 		WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);  in dce_v8_0_set_crtc_vline_interrupt_state()
2975 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block);  in dce_v8_0_set_crtc_vline_interrupt_state()
2976 		lb_interrupt_mask |= LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK_MASK;  in dce_v8_0_set_crtc_vline_interrupt_state()
2977 		WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);  in dce_v8_0_set_crtc_vline_interrupt_state()