Lines Matching refs:crtc
153 static u32 dce_v6_0_vblank_get_counter(struct amdgpu_device *adev, int crtc) in dce_v6_0_vblank_get_counter() argument
155 if (crtc >= adev->mode_info.num_crtc) in dce_v6_0_vblank_get_counter()
158 return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]); in dce_v6_0_vblank_get_counter()
215 static int dce_v6_0_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, in dce_v6_0_crtc_get_scanoutpos() argument
218 if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc)) in dce_v6_0_crtc_get_scanoutpos()
220 *vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]); in dce_v6_0_crtc_get_scanoutpos()
221 *position = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]); in dce_v6_0_crtc_get_scanoutpos()
410 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); in dce_v6_0_program_fmt()
1494 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); in dce_v6_0_audio_set_dto()
1683 if (encoder->crtc) { in dce_v6_0_afmt_setmode()
1684 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); in dce_v6_0_afmt_setmode()
1789 static void dce_v6_0_vga_enable(struct drm_crtc *crtc, bool enable) in dce_v6_0_vga_enable() argument
1791 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_vga_enable()
1792 struct drm_device *dev = crtc->dev; in dce_v6_0_vga_enable()
1800 static void dce_v6_0_grph_enable(struct drm_crtc *crtc, bool enable) in dce_v6_0_grph_enable() argument
1802 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_grph_enable()
1803 struct drm_device *dev = crtc->dev; in dce_v6_0_grph_enable()
1809 static int dce_v6_0_crtc_do_set_base(struct drm_crtc *crtc, in dce_v6_0_crtc_do_set_base() argument
1813 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_crtc_do_set_base()
1814 struct drm_device *dev = crtc->dev; in dce_v6_0_crtc_do_set_base()
1827 if (!atomic && !crtc->primary->fb) { in dce_v6_0_crtc_do_set_base()
1835 target_fb = crtc->primary->fb; in dce_v6_0_crtc_do_set_base()
1960 dce_v6_0_vga_enable(crtc, false); in dce_v6_0_crtc_do_set_base()
2000 dce_v6_0_grph_enable(crtc, true); in dce_v6_0_crtc_do_set_base()
2008 viewport_w = crtc->mode.hdisplay; in dce_v6_0_crtc_do_set_base()
2009 viewport_h = (crtc->mode.vdisplay + 1) & ~1; in dce_v6_0_crtc_do_set_base()
2017 if (!atomic && fb && fb != crtc->primary->fb) { in dce_v6_0_crtc_do_set_base()
2033 static void dce_v6_0_set_interleave(struct drm_crtc *crtc, in dce_v6_0_set_interleave() argument
2036 struct drm_device *dev = crtc->dev; in dce_v6_0_set_interleave()
2038 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_set_interleave()
2047 static void dce_v6_0_crtc_load_lut(struct drm_crtc *crtc) in dce_v6_0_crtc_load_lut() argument
2050 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_crtc_load_lut()
2051 struct drm_device *dev = crtc->dev; in dce_v6_0_crtc_load_lut()
2083 r = crtc->gamma_store; in dce_v6_0_crtc_load_lut()
2084 g = r + crtc->gamma_size; in dce_v6_0_crtc_load_lut()
2085 b = g + crtc->gamma_size; in dce_v6_0_crtc_load_lut()
2148 static u32 dce_v6_0_pick_pll(struct drm_crtc *crtc) in dce_v6_0_pick_pll() argument
2150 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_pick_pll()
2151 struct drm_device *dev = crtc->dev; in dce_v6_0_pick_pll()
2164 pll = amdgpu_pll_get_shared_nondp_ppll(crtc); in dce_v6_0_pick_pll()
2170 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v6_0_pick_pll()
2179 static void dce_v6_0_lock_cursor(struct drm_crtc *crtc, bool lock) in dce_v6_0_lock_cursor() argument
2181 struct amdgpu_device *adev = drm_to_adev(crtc->dev); in dce_v6_0_lock_cursor()
2182 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_lock_cursor()
2193 static void dce_v6_0_hide_cursor(struct drm_crtc *crtc) in dce_v6_0_hide_cursor() argument
2195 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_hide_cursor()
2196 struct amdgpu_device *adev = drm_to_adev(crtc->dev); in dce_v6_0_hide_cursor()
2205 static void dce_v6_0_show_cursor(struct drm_crtc *crtc) in dce_v6_0_show_cursor() argument
2207 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_show_cursor()
2208 struct amdgpu_device *adev = drm_to_adev(crtc->dev); in dce_v6_0_show_cursor()
2222 static int dce_v6_0_cursor_move_locked(struct drm_crtc *crtc, in dce_v6_0_cursor_move_locked() argument
2225 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_cursor_move_locked()
2226 struct amdgpu_device *adev = drm_to_adev(crtc->dev); in dce_v6_0_cursor_move_locked()
2235 x += crtc->x; in dce_v6_0_cursor_move_locked()
2236 y += crtc->y; in dce_v6_0_cursor_move_locked()
2237 DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); in dce_v6_0_cursor_move_locked()
2256 static int dce_v6_0_crtc_cursor_move(struct drm_crtc *crtc, in dce_v6_0_crtc_cursor_move() argument
2261 dce_v6_0_lock_cursor(crtc, true); in dce_v6_0_crtc_cursor_move()
2262 ret = dce_v6_0_cursor_move_locked(crtc, x, y); in dce_v6_0_crtc_cursor_move()
2263 dce_v6_0_lock_cursor(crtc, false); in dce_v6_0_crtc_cursor_move()
2268 static int dce_v6_0_crtc_cursor_set2(struct drm_crtc *crtc, in dce_v6_0_crtc_cursor_set2() argument
2276 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_crtc_cursor_set2()
2283 dce_v6_0_hide_cursor(crtc); in dce_v6_0_crtc_cursor_set2()
2316 dce_v6_0_lock_cursor(crtc, true); in dce_v6_0_crtc_cursor_set2()
2327 dce_v6_0_cursor_move_locked(crtc, x, y); in dce_v6_0_crtc_cursor_set2()
2335 dce_v6_0_show_cursor(crtc); in dce_v6_0_crtc_cursor_set2()
2336 dce_v6_0_lock_cursor(crtc, false); in dce_v6_0_crtc_cursor_set2()
2353 static void dce_v6_0_cursor_reset(struct drm_crtc *crtc) in dce_v6_0_cursor_reset() argument
2355 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_cursor_reset()
2358 dce_v6_0_lock_cursor(crtc, true); in dce_v6_0_cursor_reset()
2360 dce_v6_0_cursor_move_locked(crtc, amdgpu_crtc->cursor_x, in dce_v6_0_cursor_reset()
2363 dce_v6_0_show_cursor(crtc); in dce_v6_0_cursor_reset()
2364 dce_v6_0_lock_cursor(crtc, false); in dce_v6_0_cursor_reset()
2368 static int dce_v6_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, in dce_v6_0_crtc_gamma_set() argument
2372 dce_v6_0_crtc_load_lut(crtc); in dce_v6_0_crtc_gamma_set()
2377 static void dce_v6_0_crtc_destroy(struct drm_crtc *crtc) in dce_v6_0_crtc_destroy() argument
2379 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_crtc_destroy()
2381 drm_crtc_cleanup(crtc); in dce_v6_0_crtc_destroy()
2398 static void dce_v6_0_crtc_dpms(struct drm_crtc *crtc, int mode) in dce_v6_0_crtc_dpms() argument
2400 struct drm_device *dev = crtc->dev; in dce_v6_0_crtc_dpms()
2402 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_crtc_dpms()
2408 amdgpu_atombios_crtc_enable(crtc, ATOM_ENABLE); in dce_v6_0_crtc_dpms()
2409 amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); in dce_v6_0_crtc_dpms()
2415 drm_crtc_vblank_on(crtc); in dce_v6_0_crtc_dpms()
2416 dce_v6_0_crtc_load_lut(crtc); in dce_v6_0_crtc_dpms()
2421 drm_crtc_vblank_off(crtc); in dce_v6_0_crtc_dpms()
2423 amdgpu_atombios_crtc_blank(crtc, ATOM_ENABLE); in dce_v6_0_crtc_dpms()
2424 amdgpu_atombios_crtc_enable(crtc, ATOM_DISABLE); in dce_v6_0_crtc_dpms()
2432 static void dce_v6_0_crtc_prepare(struct drm_crtc *crtc) in dce_v6_0_crtc_prepare() argument
2435 amdgpu_atombios_crtc_powergate(crtc, ATOM_DISABLE); in dce_v6_0_crtc_prepare()
2436 amdgpu_atombios_crtc_lock(crtc, ATOM_ENABLE); in dce_v6_0_crtc_prepare()
2437 dce_v6_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); in dce_v6_0_crtc_prepare()
2440 static void dce_v6_0_crtc_commit(struct drm_crtc *crtc) in dce_v6_0_crtc_commit() argument
2442 dce_v6_0_crtc_dpms(crtc, DRM_MODE_DPMS_ON); in dce_v6_0_crtc_commit()
2443 amdgpu_atombios_crtc_lock(crtc, ATOM_DISABLE); in dce_v6_0_crtc_commit()
2446 static void dce_v6_0_crtc_disable(struct drm_crtc *crtc) in dce_v6_0_crtc_disable() argument
2449 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_crtc_disable()
2450 struct drm_device *dev = crtc->dev; in dce_v6_0_crtc_disable()
2455 dce_v6_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); in dce_v6_0_crtc_disable()
2456 if (crtc->primary->fb) { in dce_v6_0_crtc_disable()
2460 abo = gem_to_amdgpu_bo(crtc->primary->fb->obj[0]); in dce_v6_0_crtc_disable()
2470 dce_v6_0_grph_enable(crtc, false); in dce_v6_0_crtc_disable()
2472 amdgpu_atombios_crtc_powergate(crtc, ATOM_ENABLE); in dce_v6_0_crtc_disable()
2490 amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, in dce_v6_0_crtc_disable()
2503 static int dce_v6_0_crtc_mode_set(struct drm_crtc *crtc, in dce_v6_0_crtc_mode_set() argument
2508 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_crtc_mode_set()
2513 amdgpu_atombios_crtc_set_pll(crtc, adjusted_mode); in dce_v6_0_crtc_mode_set()
2514 amdgpu_atombios_crtc_set_dtd_timing(crtc, adjusted_mode); in dce_v6_0_crtc_mode_set()
2515 dce_v6_0_crtc_do_set_base(crtc, old_fb, x, y, 0); in dce_v6_0_crtc_mode_set()
2516 amdgpu_atombios_crtc_overscan_setup(crtc, mode, adjusted_mode); in dce_v6_0_crtc_mode_set()
2517 amdgpu_atombios_crtc_scaler_setup(crtc); in dce_v6_0_crtc_mode_set()
2518 dce_v6_0_cursor_reset(crtc); in dce_v6_0_crtc_mode_set()
2525 static bool dce_v6_0_crtc_mode_fixup(struct drm_crtc *crtc, in dce_v6_0_crtc_mode_fixup() argument
2530 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v6_0_crtc_mode_fixup()
2531 struct drm_device *dev = crtc->dev; in dce_v6_0_crtc_mode_fixup()
2536 if (encoder->crtc == crtc) { in dce_v6_0_crtc_mode_fixup()
2547 if (!amdgpu_display_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode)) in dce_v6_0_crtc_mode_fixup()
2549 if (amdgpu_atombios_crtc_prepare_pll(crtc, adjusted_mode)) in dce_v6_0_crtc_mode_fixup()
2552 amdgpu_crtc->pll_id = dce_v6_0_pick_pll(crtc); in dce_v6_0_crtc_mode_fixup()
2561 static int dce_v6_0_crtc_set_base(struct drm_crtc *crtc, int x, int y, in dce_v6_0_crtc_set_base() argument
2564 return dce_v6_0_crtc_do_set_base(crtc, old_fb, x, y, 0); in dce_v6_0_crtc_set_base()
2567 static int dce_v6_0_crtc_set_base_atomic(struct drm_crtc *crtc, in dce_v6_0_crtc_set_base_atomic() argument
2571 return dce_v6_0_crtc_do_set_base(crtc, fb, x, y, 1); in dce_v6_0_crtc_set_base_atomic()
2839 int crtc, in dce_v6_0_set_crtc_vblank_interrupt_state() argument
2844 if (crtc >= adev->mode_info.num_crtc) { in dce_v6_0_set_crtc_vblank_interrupt_state()
2845 DRM_DEBUG("invalid crtc %d\n", crtc); in dce_v6_0_set_crtc_vblank_interrupt_state()
2849 switch (crtc) { in dce_v6_0_set_crtc_vblank_interrupt_state()
2869 DRM_DEBUG("invalid crtc %d\n", crtc); in dce_v6_0_set_crtc_vblank_interrupt_state()
2890 int crtc, in dce_v6_0_set_crtc_vline_interrupt_state() argument
2978 unsigned crtc = entry->src_id - 1; in dce_v6_0_crtc_irq() local
2979 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v6_0_crtc_irq()
2981 crtc); in dce_v6_0_crtc_irq()
2985 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v6_0_crtc_irq()
2986 WREG32(mmVBLANK_STATUS + crtc_offsets[crtc], VBLANK_ACK); in dce_v6_0_crtc_irq()
2991 drm_handle_vblank(adev_to_drm(adev), crtc); in dce_v6_0_crtc_irq()
2993 DRM_DEBUG("IH: D%d vblank\n", crtc + 1); in dce_v6_0_crtc_irq()
2996 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v6_0_crtc_irq()
2997 WREG32(mmVLINE_STATUS + crtc_offsets[crtc], VLINE_ACK); in dce_v6_0_crtc_irq()
3001 DRM_DEBUG("IH: D%d vline\n", crtc + 1); in dce_v6_0_crtc_irq()
3159 dce_v6_0_set_interleave(encoder->crtc, mode); in dce_v6_0_encoder_mode_set()