Lines Matching refs:crtc
219 static u32 dce_v11_0_vblank_get_counter(struct amdgpu_device *adev, int crtc) in dce_v11_0_vblank_get_counter() argument
221 if (crtc < 0 || crtc >= adev->mode_info.num_crtc) in dce_v11_0_vblank_get_counter()
224 return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]); in dce_v11_0_vblank_get_counter()
281 static int dce_v11_0_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, in dce_v11_0_crtc_get_scanoutpos() argument
284 if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc)) in dce_v11_0_crtc_get_scanoutpos()
287 *vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]); in dce_v11_0_crtc_get_scanoutpos()
288 *position = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]); in dce_v11_0_crtc_get_scanoutpos()
538 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); in dce_v11_0_program_fmt()
1589 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); in dce_v11_0_audio_set_dto()
1635 if (encoder->crtc) { in dce_v11_0_afmt_setmode()
1636 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); in dce_v11_0_afmt_setmode()
1866 static void dce_v11_0_vga_enable(struct drm_crtc *crtc, bool enable) in dce_v11_0_vga_enable() argument
1868 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_vga_enable()
1869 struct drm_device *dev = crtc->dev; in dce_v11_0_vga_enable()
1880 static void dce_v11_0_grph_enable(struct drm_crtc *crtc, bool enable) in dce_v11_0_grph_enable() argument
1882 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_grph_enable()
1883 struct drm_device *dev = crtc->dev; in dce_v11_0_grph_enable()
1892 static int dce_v11_0_crtc_do_set_base(struct drm_crtc *crtc, in dce_v11_0_crtc_do_set_base() argument
1896 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_crtc_do_set_base()
1897 struct drm_device *dev = crtc->dev; in dce_v11_0_crtc_do_set_base()
1911 if (!atomic && !crtc->primary->fb) { in dce_v11_0_crtc_do_set_base()
1919 target_fb = crtc->primary->fb; in dce_v11_0_crtc_do_set_base()
2060 dce_v11_0_vga_enable(crtc, false); in dce_v11_0_crtc_do_set_base()
2106 dce_v11_0_grph_enable(crtc, true); in dce_v11_0_crtc_do_set_base()
2115 viewport_w = crtc->mode.hdisplay; in dce_v11_0_crtc_do_set_base()
2116 viewport_h = (crtc->mode.vdisplay + 1) & ~1; in dce_v11_0_crtc_do_set_base()
2123 if (!atomic && fb && fb != crtc->primary->fb) { in dce_v11_0_crtc_do_set_base()
2138 static void dce_v11_0_set_interleave(struct drm_crtc *crtc, in dce_v11_0_set_interleave() argument
2141 struct drm_device *dev = crtc->dev; in dce_v11_0_set_interleave()
2143 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_set_interleave()
2154 static void dce_v11_0_crtc_load_lut(struct drm_crtc *crtc) in dce_v11_0_crtc_load_lut() argument
2156 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_crtc_load_lut()
2157 struct drm_device *dev = crtc->dev; in dce_v11_0_crtc_load_lut()
2191 r = crtc->gamma_store; in dce_v11_0_crtc_load_lut()
2192 g = r + crtc->gamma_size; in dce_v11_0_crtc_load_lut()
2193 b = g + crtc->gamma_size; in dce_v11_0_crtc_load_lut()
2280 static u32 dce_v11_0_pick_pll(struct drm_crtc *crtc) in dce_v11_0_pick_pll() argument
2282 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_pick_pll()
2283 struct drm_device *dev = crtc->dev; in dce_v11_0_pick_pll()
2327 pll = amdgpu_pll_get_shared_dp_ppll(crtc); in dce_v11_0_pick_pll()
2333 pll = amdgpu_pll_get_shared_nondp_ppll(crtc); in dce_v11_0_pick_pll()
2339 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v11_0_pick_pll()
2360 static void dce_v11_0_lock_cursor(struct drm_crtc *crtc, bool lock) in dce_v11_0_lock_cursor() argument
2362 struct amdgpu_device *adev = drm_to_adev(crtc->dev); in dce_v11_0_lock_cursor()
2363 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_lock_cursor()
2374 static void dce_v11_0_hide_cursor(struct drm_crtc *crtc) in dce_v11_0_hide_cursor() argument
2376 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_hide_cursor()
2377 struct amdgpu_device *adev = drm_to_adev(crtc->dev); in dce_v11_0_hide_cursor()
2385 static void dce_v11_0_show_cursor(struct drm_crtc *crtc) in dce_v11_0_show_cursor() argument
2387 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_show_cursor()
2388 struct amdgpu_device *adev = drm_to_adev(crtc->dev); in dce_v11_0_show_cursor()
2402 static int dce_v11_0_cursor_move_locked(struct drm_crtc *crtc, in dce_v11_0_cursor_move_locked() argument
2405 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_cursor_move_locked()
2406 struct amdgpu_device *adev = drm_to_adev(crtc->dev); in dce_v11_0_cursor_move_locked()
2413 x += crtc->x; in dce_v11_0_cursor_move_locked()
2414 y += crtc->y; in dce_v11_0_cursor_move_locked()
2415 DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); in dce_v11_0_cursor_move_locked()
2434 static int dce_v11_0_crtc_cursor_move(struct drm_crtc *crtc, in dce_v11_0_crtc_cursor_move() argument
2439 dce_v11_0_lock_cursor(crtc, true); in dce_v11_0_crtc_cursor_move()
2440 ret = dce_v11_0_cursor_move_locked(crtc, x, y); in dce_v11_0_crtc_cursor_move()
2441 dce_v11_0_lock_cursor(crtc, false); in dce_v11_0_crtc_cursor_move()
2446 static int dce_v11_0_crtc_cursor_set2(struct drm_crtc *crtc, in dce_v11_0_crtc_cursor_set2() argument
2454 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_crtc_cursor_set2()
2461 dce_v11_0_hide_cursor(crtc); in dce_v11_0_crtc_cursor_set2()
2494 dce_v11_0_lock_cursor(crtc, true); in dce_v11_0_crtc_cursor_set2()
2505 dce_v11_0_cursor_move_locked(crtc, x, y); in dce_v11_0_crtc_cursor_set2()
2513 dce_v11_0_show_cursor(crtc); in dce_v11_0_crtc_cursor_set2()
2514 dce_v11_0_lock_cursor(crtc, false); in dce_v11_0_crtc_cursor_set2()
2531 static void dce_v11_0_cursor_reset(struct drm_crtc *crtc) in dce_v11_0_cursor_reset() argument
2533 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_cursor_reset()
2536 dce_v11_0_lock_cursor(crtc, true); in dce_v11_0_cursor_reset()
2538 dce_v11_0_cursor_move_locked(crtc, amdgpu_crtc->cursor_x, in dce_v11_0_cursor_reset()
2541 dce_v11_0_show_cursor(crtc); in dce_v11_0_cursor_reset()
2543 dce_v11_0_lock_cursor(crtc, false); in dce_v11_0_cursor_reset()
2547 static int dce_v11_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, in dce_v11_0_crtc_gamma_set() argument
2551 dce_v11_0_crtc_load_lut(crtc); in dce_v11_0_crtc_gamma_set()
2556 static void dce_v11_0_crtc_destroy(struct drm_crtc *crtc) in dce_v11_0_crtc_destroy() argument
2558 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_crtc_destroy()
2560 drm_crtc_cleanup(crtc); in dce_v11_0_crtc_destroy()
2577 static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, int mode) in dce_v11_0_crtc_dpms() argument
2579 struct drm_device *dev = crtc->dev; in dce_v11_0_crtc_dpms()
2581 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_crtc_dpms()
2587 amdgpu_atombios_crtc_enable(crtc, ATOM_ENABLE); in dce_v11_0_crtc_dpms()
2588 dce_v11_0_vga_enable(crtc, true); in dce_v11_0_crtc_dpms()
2589 amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); in dce_v11_0_crtc_dpms()
2590 dce_v11_0_vga_enable(crtc, false); in dce_v11_0_crtc_dpms()
2596 drm_crtc_vblank_on(crtc); in dce_v11_0_crtc_dpms()
2597 dce_v11_0_crtc_load_lut(crtc); in dce_v11_0_crtc_dpms()
2602 drm_crtc_vblank_off(crtc); in dce_v11_0_crtc_dpms()
2604 dce_v11_0_vga_enable(crtc, true); in dce_v11_0_crtc_dpms()
2605 amdgpu_atombios_crtc_blank(crtc, ATOM_ENABLE); in dce_v11_0_crtc_dpms()
2606 dce_v11_0_vga_enable(crtc, false); in dce_v11_0_crtc_dpms()
2608 amdgpu_atombios_crtc_enable(crtc, ATOM_DISABLE); in dce_v11_0_crtc_dpms()
2616 static void dce_v11_0_crtc_prepare(struct drm_crtc *crtc) in dce_v11_0_crtc_prepare() argument
2619 amdgpu_atombios_crtc_powergate(crtc, ATOM_DISABLE); in dce_v11_0_crtc_prepare()
2620 amdgpu_atombios_crtc_lock(crtc, ATOM_ENABLE); in dce_v11_0_crtc_prepare()
2621 dce_v11_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); in dce_v11_0_crtc_prepare()
2624 static void dce_v11_0_crtc_commit(struct drm_crtc *crtc) in dce_v11_0_crtc_commit() argument
2626 dce_v11_0_crtc_dpms(crtc, DRM_MODE_DPMS_ON); in dce_v11_0_crtc_commit()
2627 amdgpu_atombios_crtc_lock(crtc, ATOM_DISABLE); in dce_v11_0_crtc_commit()
2630 static void dce_v11_0_crtc_disable(struct drm_crtc *crtc) in dce_v11_0_crtc_disable() argument
2632 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_crtc_disable()
2633 struct drm_device *dev = crtc->dev; in dce_v11_0_crtc_disable()
2638 dce_v11_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); in dce_v11_0_crtc_disable()
2639 if (crtc->primary->fb) { in dce_v11_0_crtc_disable()
2643 abo = gem_to_amdgpu_bo(crtc->primary->fb->obj[0]); in dce_v11_0_crtc_disable()
2653 dce_v11_0_grph_enable(crtc, false); in dce_v11_0_crtc_disable()
2655 amdgpu_atombios_crtc_powergate(crtc, ATOM_ENABLE); in dce_v11_0_crtc_disable()
2674 amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, in dce_v11_0_crtc_disable()
2684 amdgpu_atombios_crtc_program_pll(crtc, ATOM_CRTC_INVALID, amdgpu_crtc->pll_id, in dce_v11_0_crtc_disable()
2697 static int dce_v11_0_crtc_mode_set(struct drm_crtc *crtc, in dce_v11_0_crtc_mode_set() argument
2702 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_crtc_mode_set()
2703 struct drm_device *dev = crtc->dev; in dce_v11_0_crtc_mode_set()
2719 amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, in dce_v11_0_crtc_mode_set()
2725 amdgpu_atombios_crtc_set_pll(crtc, adjusted_mode); in dce_v11_0_crtc_mode_set()
2727 amdgpu_atombios_crtc_set_dtd_timing(crtc, adjusted_mode); in dce_v11_0_crtc_mode_set()
2728 dce_v11_0_crtc_do_set_base(crtc, old_fb, x, y, 0); in dce_v11_0_crtc_mode_set()
2729 amdgpu_atombios_crtc_overscan_setup(crtc, mode, adjusted_mode); in dce_v11_0_crtc_mode_set()
2730 amdgpu_atombios_crtc_scaler_setup(crtc); in dce_v11_0_crtc_mode_set()
2731 dce_v11_0_cursor_reset(crtc); in dce_v11_0_crtc_mode_set()
2738 static bool dce_v11_0_crtc_mode_fixup(struct drm_crtc *crtc, in dce_v11_0_crtc_mode_fixup() argument
2742 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_v11_0_crtc_mode_fixup()
2743 struct drm_device *dev = crtc->dev; in dce_v11_0_crtc_mode_fixup()
2748 if (encoder->crtc == crtc) { in dce_v11_0_crtc_mode_fixup()
2759 if (!amdgpu_display_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode)) in dce_v11_0_crtc_mode_fixup()
2761 if (amdgpu_atombios_crtc_prepare_pll(crtc, adjusted_mode)) in dce_v11_0_crtc_mode_fixup()
2764 amdgpu_crtc->pll_id = dce_v11_0_pick_pll(crtc); in dce_v11_0_crtc_mode_fixup()
2773 static int dce_v11_0_crtc_set_base(struct drm_crtc *crtc, int x, int y, in dce_v11_0_crtc_set_base() argument
2776 return dce_v11_0_crtc_do_set_base(crtc, old_fb, x, y, 0); in dce_v11_0_crtc_set_base()
2779 static int dce_v11_0_crtc_set_base_atomic(struct drm_crtc *crtc, in dce_v11_0_crtc_set_base_atomic() argument
2783 return dce_v11_0_crtc_do_set_base(crtc, fb, x, y, 1); in dce_v11_0_crtc_set_base_atomic()
3117 int crtc, in dce_v11_0_set_crtc_vblank_interrupt_state() argument
3122 if (crtc >= adev->mode_info.num_crtc) { in dce_v11_0_set_crtc_vblank_interrupt_state()
3123 DRM_DEBUG("invalid crtc %d\n", crtc); in dce_v11_0_set_crtc_vblank_interrupt_state()
3129 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v11_0_set_crtc_vblank_interrupt_state()
3132 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v11_0_set_crtc_vblank_interrupt_state()
3135 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v11_0_set_crtc_vblank_interrupt_state()
3138 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v11_0_set_crtc_vblank_interrupt_state()
3146 int crtc, in dce_v11_0_set_crtc_vline_interrupt_state() argument
3151 if (crtc >= adev->mode_info.num_crtc) { in dce_v11_0_set_crtc_vline_interrupt_state()
3152 DRM_DEBUG("invalid crtc %d\n", crtc); in dce_v11_0_set_crtc_vline_interrupt_state()
3158 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v11_0_set_crtc_vline_interrupt_state()
3161 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v11_0_set_crtc_vline_interrupt_state()
3164 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v11_0_set_crtc_vline_interrupt_state()
3167 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v11_0_set_crtc_vline_interrupt_state()
3344 int crtc) in dce_v11_0_crtc_vblank_int_ack() argument
3348 if (crtc < 0 || crtc >= adev->mode_info.num_crtc) { in dce_v11_0_crtc_vblank_int_ack()
3349 DRM_DEBUG("invalid crtc %d\n", crtc); in dce_v11_0_crtc_vblank_int_ack()
3353 tmp = RREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc]); in dce_v11_0_crtc_vblank_int_ack()
3355 WREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc], tmp); in dce_v11_0_crtc_vblank_int_ack()
3359 int crtc) in dce_v11_0_crtc_vline_int_ack() argument
3363 if (crtc < 0 || crtc >= adev->mode_info.num_crtc) { in dce_v11_0_crtc_vline_int_ack()
3364 DRM_DEBUG("invalid crtc %d\n", crtc); in dce_v11_0_crtc_vline_int_ack()
3368 tmp = RREG32(mmLB_VLINE_STATUS + crtc_offsets[crtc]); in dce_v11_0_crtc_vline_int_ack()
3370 WREG32(mmLB_VLINE_STATUS + crtc_offsets[crtc], tmp); in dce_v11_0_crtc_vline_int_ack()
3377 unsigned crtc = entry->src_id - 1; in dce_v11_0_crtc_irq() local
3378 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v11_0_crtc_irq()
3380 crtc); in dce_v11_0_crtc_irq()
3384 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v11_0_crtc_irq()
3385 dce_v11_0_crtc_vblank_int_ack(adev, crtc); in dce_v11_0_crtc_irq()
3390 drm_handle_vblank(adev_to_drm(adev), crtc); in dce_v11_0_crtc_irq()
3392 DRM_DEBUG("IH: D%d vblank\n", crtc + 1); in dce_v11_0_crtc_irq()
3396 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v11_0_crtc_irq()
3397 dce_v11_0_crtc_vline_int_ack(adev, crtc); in dce_v11_0_crtc_irq()
3401 DRM_DEBUG("IH: D%d vline\n", crtc + 1); in dce_v11_0_crtc_irq()
3479 dce_v11_0_set_interleave(encoder->crtc, mode); in dce_v11_0_encoder_mode_set()