Lines Matching defs:amdgpu_rlc
186 struct amdgpu_rlc { struct
207 const struct amdgpu_rlc_funcs *funcs; argument
210 u32 save_and_restore_offset;
211 u32 clear_state_descriptor_offset;
212 u32 avail_scratch_ram_locations;
213 u32 reg_restore_list_size;
214 u32 reg_list_format_start;
215 u32 reg_list_format_separate_start;
216 u32 starting_offsets_start;
217 u32 reg_list_format_size_bytes;
218 u32 reg_list_size_bytes;
219 u32 reg_list_format_direct_reg_list_length;
220 u32 save_restore_list_cntl_size_bytes;
221 u32 save_restore_list_gpm_size_bytes;
222 u32 save_restore_list_srm_size_bytes;
223 u32 rlc_iram_ucode_size_bytes;
224 u32 rlc_dram_ucode_size_bytes;
225 u32 rlcp_ucode_size_bytes;
226 u32 rlcv_ucode_size_bytes;
227 u32 global_tap_delays_ucode_size_bytes;
228 u32 se0_tap_delays_ucode_size_bytes;
229 u32 se1_tap_delays_ucode_size_bytes;
230 u32 se2_tap_delays_ucode_size_bytes;
231 u32 se3_tap_delays_ucode_size_bytes;
233 u32 *register_list_format;
234 u32 *register_restore;
235 u8 *save_restore_list_cntl;
236 u8 *save_restore_list_gpm;
237 u8 *save_restore_list_srm;
238 u8 *rlc_iram_ucode;
262 struct amdgpu_rlcg_reg_access_ctrl reg_access_ctrl[AMDGPU_MAX_RLC_INSTANCES]; argument