Lines Matching refs:ring

126 int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned int num_ibs,  in amdgpu_ib_schedule()  argument
130 struct amdgpu_device *adev = ring->adev; in amdgpu_ib_schedule()
168 if (!ring->sched.ready && !ring->is_mes_queue) { in amdgpu_ib_schedule()
169 dev_err(adev->dev, "couldn't schedule ib on ring <%s>\n", ring->name); in amdgpu_ib_schedule()
173 if (vm && !job->vmid && !ring->is_mes_queue) { in amdgpu_ib_schedule()
179 (!ring->funcs->secure_submission_supported)) { in amdgpu_ib_schedule()
180 dev_err(adev->dev, "secure submissions not supported on ring <%s>\n", ring->name); in amdgpu_ib_schedule()
184 alloc_size = ring->funcs->emit_frame_size + num_ibs * in amdgpu_ib_schedule()
185 ring->funcs->emit_ib_size; in amdgpu_ib_schedule()
187 r = amdgpu_ring_alloc(ring, alloc_size); in amdgpu_ib_schedule()
193 need_ctx_switch = ring->current_ctx != fence_ctx; in amdgpu_ib_schedule()
194 if (ring->funcs->emit_pipeline_sync && job && in amdgpu_ib_schedule()
197 amdgpu_vm_need_pipeline_sync(ring, job))) { in amdgpu_ib_schedule()
206 if ((ib->flags & AMDGPU_IB_FLAG_EMIT_MEM_SYNC) && ring->funcs->emit_mem_sync) in amdgpu_ib_schedule()
207 ring->funcs->emit_mem_sync(ring); in amdgpu_ib_schedule()
209 if (ring->funcs->emit_wave_limit && in amdgpu_ib_schedule()
210 ring->hw_prio == AMDGPU_GFX_PIPE_PRIO_HIGH) in amdgpu_ib_schedule()
211 ring->funcs->emit_wave_limit(ring, true); in amdgpu_ib_schedule()
213 if (ring->funcs->insert_start) in amdgpu_ib_schedule()
214 ring->funcs->insert_start(ring); in amdgpu_ib_schedule()
217 r = amdgpu_vm_flush(ring, job, need_pipe_sync); in amdgpu_ib_schedule()
219 amdgpu_ring_undo(ring); in amdgpu_ib_schedule()
224 amdgpu_ring_ib_begin(ring); in amdgpu_ib_schedule()
226 if (ring->funcs->emit_gfx_shadow) in amdgpu_ib_schedule()
227 amdgpu_ring_emit_gfx_shadow(ring, shadow_va, csa_va, gds_va, in amdgpu_ib_schedule()
230 if (ring->funcs->init_cond_exec) in amdgpu_ib_schedule()
231 patch_offset = amdgpu_ring_init_cond_exec(ring); in amdgpu_ib_schedule()
233 amdgpu_device_flush_hdp(adev, ring); in amdgpu_ib_schedule()
238 if (job && ring->funcs->emit_cntxcntl) { in amdgpu_ib_schedule()
241 amdgpu_ring_emit_cntxcntl(ring, status); in amdgpu_ib_schedule()
247 if (job && ring->funcs->emit_frame_cntl) { in amdgpu_ib_schedule()
249 amdgpu_ring_emit_frame_cntl(ring, true, secure); in amdgpu_ib_schedule()
255 if (job && ring->funcs->emit_frame_cntl) { in amdgpu_ib_schedule()
257 amdgpu_ring_emit_frame_cntl(ring, false, secure); in amdgpu_ib_schedule()
259 amdgpu_ring_emit_frame_cntl(ring, true, secure); in amdgpu_ib_schedule()
263 amdgpu_ring_emit_ib(ring, job, ib, status); in amdgpu_ib_schedule()
267 if (job && ring->funcs->emit_frame_cntl) in amdgpu_ib_schedule()
268 amdgpu_ring_emit_frame_cntl(ring, false, secure); in amdgpu_ib_schedule()
270 amdgpu_device_invalidate_hdp(adev, ring); in amdgpu_ib_schedule()
277 amdgpu_ring_emit_fence(ring, job->uf_addr, job->uf_sequence, in amdgpu_ib_schedule()
281 if (ring->funcs->emit_gfx_shadow) { in amdgpu_ib_schedule()
282 amdgpu_ring_emit_gfx_shadow(ring, 0, 0, 0, false, 0); in amdgpu_ib_schedule()
284 if (ring->funcs->init_cond_exec) { in amdgpu_ib_schedule()
287 ce_offset = amdgpu_ring_init_cond_exec(ring); in amdgpu_ib_schedule()
288 if (ce_offset != ~0 && ring->funcs->patch_cond_exec) in amdgpu_ib_schedule()
289 amdgpu_ring_patch_cond_exec(ring, ce_offset); in amdgpu_ib_schedule()
293 r = amdgpu_fence_emit(ring, f, job, fence_flags); in amdgpu_ib_schedule()
297 amdgpu_vmid_reset(adev, ring->vm_hub, job->vmid); in amdgpu_ib_schedule()
298 amdgpu_ring_undo(ring); in amdgpu_ib_schedule()
302 if (ring->funcs->insert_end) in amdgpu_ib_schedule()
303 ring->funcs->insert_end(ring); in amdgpu_ib_schedule()
305 if (patch_offset != ~0 && ring->funcs->patch_cond_exec) in amdgpu_ib_schedule()
306 amdgpu_ring_patch_cond_exec(ring, patch_offset); in amdgpu_ib_schedule()
308 ring->current_ctx = fence_ctx; in amdgpu_ib_schedule()
309 if (vm && ring->funcs->emit_switch_buffer) in amdgpu_ib_schedule()
310 amdgpu_ring_emit_switch_buffer(ring); in amdgpu_ib_schedule()
312 if (ring->funcs->emit_wave_limit && in amdgpu_ib_schedule()
313 ring->hw_prio == AMDGPU_GFX_PIPE_PRIO_HIGH) in amdgpu_ib_schedule()
314 ring->funcs->emit_wave_limit(ring, false); in amdgpu_ib_schedule()
316 amdgpu_ring_ib_end(ring); in amdgpu_ib_schedule()
317 amdgpu_ring_commit(ring); in amdgpu_ib_schedule()
412 struct amdgpu_ring *ring = adev->rings[i]; in amdgpu_ib_ring_tests() local
418 if (!ring->sched.ready || !ring->funcs->test_ib) in amdgpu_ib_ring_tests()
422 ring->funcs->type == AMDGPU_RING_TYPE_KIQ) in amdgpu_ib_ring_tests()
426 if (ring->funcs->type == AMDGPU_RING_TYPE_UVD || in amdgpu_ib_ring_tests()
427 ring->funcs->type == AMDGPU_RING_TYPE_VCE || in amdgpu_ib_ring_tests()
428 ring->funcs->type == AMDGPU_RING_TYPE_UVD_ENC || in amdgpu_ib_ring_tests()
429 ring->funcs->type == AMDGPU_RING_TYPE_VCN_DEC || in amdgpu_ib_ring_tests()
430 ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC || in amdgpu_ib_ring_tests()
431 ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG) in amdgpu_ib_ring_tests()
436 r = amdgpu_ring_test_ib(ring, tmo); in amdgpu_ib_ring_tests()
439 ring->name); in amdgpu_ib_ring_tests()
443 ring->sched.ready = false; in amdgpu_ib_ring_tests()
445 ring->name, r); in amdgpu_ib_ring_tests()
447 if (ring == &adev->gfx.gfx_ring[0]) { in amdgpu_ib_ring_tests()