Lines Matching +full:0 +full:x001
99 AMDGPU_DOORBELL_KIQ = 0x000,
100 AMDGPU_DOORBELL_HIQ = 0x001,
101 AMDGPU_DOORBELL_DIQ = 0x002,
102 AMDGPU_DOORBELL_MEC_RING0 = 0x010,
103 AMDGPU_DOORBELL_MEC_RING1 = 0x011,
104 AMDGPU_DOORBELL_MEC_RING2 = 0x012,
105 AMDGPU_DOORBELL_MEC_RING3 = 0x013,
106 AMDGPU_DOORBELL_MEC_RING4 = 0x014,
107 AMDGPU_DOORBELL_MEC_RING5 = 0x015,
108 AMDGPU_DOORBELL_MEC_RING6 = 0x016,
109 AMDGPU_DOORBELL_MEC_RING7 = 0x017,
110 AMDGPU_DOORBELL_GFX_RING0 = 0x020,
111 AMDGPU_DOORBELL_sDMA_ENGINE0 = 0x1E0,
112 AMDGPU_DOORBELL_sDMA_ENGINE1 = 0x1E1,
113 AMDGPU_DOORBELL_IH = 0x1E8,
114 AMDGPU_DOORBELL_MAX_ASSIGNMENT = 0x3FF,
115 AMDGPU_DOORBELL_INVALID = 0xFFFF
120 /* Compute + GFX: 0~255 */
121 AMDGPU_VEGA20_DOORBELL_KIQ = 0x000,
122 AMDGPU_VEGA20_DOORBELL_HIQ = 0x001,
123 AMDGPU_VEGA20_DOORBELL_DIQ = 0x002,
124 AMDGPU_VEGA20_DOORBELL_MEC_RING0 = 0x003,
125 AMDGPU_VEGA20_DOORBELL_MEC_RING1 = 0x004,
126 AMDGPU_VEGA20_DOORBELL_MEC_RING2 = 0x005,
127 AMDGPU_VEGA20_DOORBELL_MEC_RING3 = 0x006,
128 AMDGPU_VEGA20_DOORBELL_MEC_RING4 = 0x007,
129 AMDGPU_VEGA20_DOORBELL_MEC_RING5 = 0x008,
130 AMDGPU_VEGA20_DOORBELL_MEC_RING6 = 0x009,
131 AMDGPU_VEGA20_DOORBELL_MEC_RING7 = 0x00A,
132 AMDGPU_VEGA20_DOORBELL_USERQUEUE_START = 0x00B,
133 AMDGPU_VEGA20_DOORBELL_USERQUEUE_END = 0x08A,
134 AMDGPU_VEGA20_DOORBELL_GFX_RING0 = 0x08B,
136 AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE0 = 0x100,
137 AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE1 = 0x10A,
138 AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE2 = 0x114,
139 AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE3 = 0x11E,
140 AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE4 = 0x128,
141 AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE5 = 0x132,
142 AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE6 = 0x13C,
143 AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE7 = 0x146,
145 AMDGPU_VEGA20_DOORBELL_IH = 0x178,
150 AMDGPU_VEGA20_DOORBELL64_VCN0_1 = 0x188, /* VNC0 */
151 AMDGPU_VEGA20_DOORBELL64_VCN2_3 = 0x189,
152 AMDGPU_VEGA20_DOORBELL64_VCN4_5 = 0x18A,
153 AMDGPU_VEGA20_DOORBELL64_VCN6_7 = 0x18B,
155 AMDGPU_VEGA20_DOORBELL64_VCN8_9 = 0x18C, /* VNC1 */
156 AMDGPU_VEGA20_DOORBELL64_VCNa_b = 0x18D,
157 AMDGPU_VEGA20_DOORBELL64_VCNc_d = 0x18E,
158 AMDGPU_VEGA20_DOORBELL64_VCNe_f = 0x18F,
160 AMDGPU_VEGA20_DOORBELL64_UVD_RING0_1 = 0x188,
161 AMDGPU_VEGA20_DOORBELL64_UVD_RING2_3 = 0x189,
162 AMDGPU_VEGA20_DOORBELL64_UVD_RING4_5 = 0x18A,
163 AMDGPU_VEGA20_DOORBELL64_UVD_RING6_7 = 0x18B,
165 AMDGPU_VEGA20_DOORBELL64_VCE_RING0_1 = 0x18C,
166 AMDGPU_VEGA20_DOORBELL64_VCE_RING2_3 = 0x18D,
167 AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5 = 0x18E,
168 AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7 = 0x18F,
174 AMDGPU_VEGA20_DOORBELL_XCC1_KIQ_START = 0x190,
175 /* 8 compute rings per GC. Max to 0x1CE */
176 AMDGPU_VEGA20_DOORBELL_XCC1_MEC_RING0_START = 0x197,
178 /* AID1 SDMA: 0x1D0 ~ 0x1F7 */
179 AMDGPU_VEGA20_DOORBELL_AID1_sDMA_START = 0x1D0,
181 AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT = 0x1F7,
182 AMDGPU_VEGA20_DOORBELL_INVALID = 0xFFFF
187 /* Compute + GFX: 0~255 */
188 AMDGPU_NAVI10_DOORBELL_KIQ = 0x000,
189 AMDGPU_NAVI10_DOORBELL_HIQ = 0x001,
190 AMDGPU_NAVI10_DOORBELL_DIQ = 0x002,
191 AMDGPU_NAVI10_DOORBELL_MEC_RING0 = 0x003,
192 AMDGPU_NAVI10_DOORBELL_MEC_RING1 = 0x004,
193 AMDGPU_NAVI10_DOORBELL_MEC_RING2 = 0x005,
194 AMDGPU_NAVI10_DOORBELL_MEC_RING3 = 0x006,
195 AMDGPU_NAVI10_DOORBELL_MEC_RING4 = 0x007,
196 AMDGPU_NAVI10_DOORBELL_MEC_RING5 = 0x008,
197 AMDGPU_NAVI10_DOORBELL_MEC_RING6 = 0x009,
198 AMDGPU_NAVI10_DOORBELL_MEC_RING7 = 0x00A,
199 AMDGPU_NAVI10_DOORBELL_MES_RING0 = 0x00B,
200 AMDGPU_NAVI10_DOORBELL_MES_RING1 = 0x00C,
201 AMDGPU_NAVI10_DOORBELL_USERQUEUE_START = 0x00D,
202 AMDGPU_NAVI10_DOORBELL_USERQUEUE_END = 0x08A,
203 AMDGPU_NAVI10_DOORBELL_GFX_RING0 = 0x08B,
204 AMDGPU_NAVI10_DOORBELL_GFX_RING1 = 0x08C,
205 AMDGPU_NAVI10_DOORBELL_GFX_USERQUEUE_START = 0x08D,
206 AMDGPU_NAVI10_DOORBELL_GFX_USERQUEUE_END = 0x0FF,
209 AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE0 = 0x100,
210 AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE1 = 0x10A,
211 AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE2 = 0x114,
212 AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE3 = 0x11E,
214 AMDGPU_NAVI10_DOORBELL_IH = 0x178,
219 AMDGPU_NAVI10_DOORBELL64_VCN0_1 = 0x188, /* lower 32 bits for VNC0 and upper 32 bits for VNC1 */
220 AMDGPU_NAVI10_DOORBELL64_VCN2_3 = 0x189,
221 AMDGPU_NAVI10_DOORBELL64_VCN4_5 = 0x18A,
222 AMDGPU_NAVI10_DOORBELL64_VCN6_7 = 0x18B,
224 AMDGPU_NAVI10_DOORBELL64_VCN8_9 = 0x18C,
225 AMDGPU_NAVI10_DOORBELL64_VCNa_b = 0x18D,
226 AMDGPU_NAVI10_DOORBELL64_VCNc_d = 0x18E,
227 AMDGPU_NAVI10_DOORBELL64_VCNe_f = 0x18F,
232 AMDGPU_NAVI10_DOORBELL_MAX_ASSIGNMENT = 0x18F,
233 AMDGPU_NAVI10_DOORBELL_INVALID = 0xFFFF
243 * Compute related doorbells are allocated from 0x00 to 0x8a
248 AMDGPU_DOORBELL64_KIQ = 0x00,
251 AMDGPU_DOORBELL64_HIQ = 0x01,
252 AMDGPU_DOORBELL64_DIQ = 0x02,
255 AMDGPU_DOORBELL64_MEC_RING0 = 0x03,
256 AMDGPU_DOORBELL64_MEC_RING1 = 0x04,
257 AMDGPU_DOORBELL64_MEC_RING2 = 0x05,
258 AMDGPU_DOORBELL64_MEC_RING3 = 0x06,
259 AMDGPU_DOORBELL64_MEC_RING4 = 0x07,
260 AMDGPU_DOORBELL64_MEC_RING5 = 0x08,
261 AMDGPU_DOORBELL64_MEC_RING6 = 0x09,
262 AMDGPU_DOORBELL64_MEC_RING7 = 0x0a,
265 AMDGPU_DOORBELL64_USERQUEUE_START = 0x0b,
266 AMDGPU_DOORBELL64_USERQUEUE_END = 0x8a,
269 AMDGPU_DOORBELL64_GFX_RING0 = 0x8b,
272 * Other graphics doorbells can be allocated here: from 0x8c to 0xdf
274 * default non-graphics QWORD index is 0xe0 - 0xFF inclusive
281 AMDGPU_DOORBELL64_sDMA_ENGINE0 = 0xF0,
282 AMDGPU_DOORBELL64_sDMA_HI_PRI_ENGINE0 = 0xF1,
283 AMDGPU_DOORBELL64_sDMA_ENGINE1 = 0xF2,
284 AMDGPU_DOORBELL64_sDMA_HI_PRI_ENGINE1 = 0xF3,
287 AMDGPU_DOORBELL64_IH = 0xF4, /* For legacy interrupt ring buffer */
288 AMDGPU_DOORBELL64_IH_RING1 = 0xF5, /* For page migration request log */
289 …AMDGPU_DOORBELL64_IH_RING2 = 0xF6, /* For page migration translation/invalidation …
292 …AMDGPU_DOORBELL64_VCN0_1 = 0xF8, /* lower 32 bits for VNC0 and upper 32 bits for …
293 AMDGPU_DOORBELL64_VCN2_3 = 0xF9,
294 AMDGPU_DOORBELL64_VCN4_5 = 0xFA,
295 AMDGPU_DOORBELL64_VCN6_7 = 0xFB,
300 AMDGPU_DOORBELL64_UVD_RING0_1 = 0xF8,
301 AMDGPU_DOORBELL64_UVD_RING2_3 = 0xF9,
302 AMDGPU_DOORBELL64_UVD_RING4_5 = 0xFA,
303 AMDGPU_DOORBELL64_UVD_RING6_7 = 0xFB,
305 AMDGPU_DOORBELL64_VCE_RING0_1 = 0xFC,
306 AMDGPU_DOORBELL64_VCE_RING2_3 = 0xFD,
307 AMDGPU_DOORBELL64_VCE_RING4_5 = 0xFE,
308 AMDGPU_DOORBELL64_VCE_RING6_7 = 0xFF,
313 AMDGPU_DOORBELL64_MAX_ASSIGNMENT = 0xFF,
314 AMDGPU_DOORBELL64_INVALID = 0xFFFF
319 /* XCC0: 0x00 ~20, XCC1: 20 ~ 2F ... */
322 AMDGPU_DOORBELL_LAYOUT1_KIQ_START = 0x000,
323 AMDGPU_DOORBELL_LAYOUT1_HIQ = 0x001,
324 AMDGPU_DOORBELL_LAYOUT1_DIQ = 0x002,
325 /* Compute: 0x08 ~ 0x20 */
326 AMDGPU_DOORBELL_LAYOUT1_MEC_RING_START = 0x008,
327 AMDGPU_DOORBELL_LAYOUT1_MEC_RING_END = 0x00F,
328 AMDGPU_DOORBELL_LAYOUT1_USERQUEUE_START = 0x010,
329 AMDGPU_DOORBELL_LAYOUT1_USERQUEUE_END = 0x01F,
330 AMDGPU_DOORBELL_LAYOUT1_XCC_RANGE = 0x020,
332 /* SDMA: 0x100 ~ 0x19F */
333 AMDGPU_DOORBELL_LAYOUT1_sDMA_ENGINE_START = 0x100,
334 AMDGPU_DOORBELL_LAYOUT1_sDMA_ENGINE_END = 0x19F,
335 /* IH: 0x1A0 ~ 0x1AF */
336 AMDGPU_DOORBELL_LAYOUT1_IH = 0x1A0,
337 /* VCN: 0x1B0 ~ 0x1E8 */
338 AMDGPU_DOORBELL_LAYOUT1_VCN_START = 0x1B0,
339 AMDGPU_DOORBELL_LAYOUT1_VCN_END = 0x1E8,
344 AMDGPU_DOORBELL_LAYOUT1_MAX_ASSIGNMENT = 0x1E8,
345 AMDGPU_DOORBELL_LAYOUT1_INVALID = 0xFFFF