52 	struct amdgpu_atpx atpx;  member
84 	return amdgpu_atpx_priv.atpx.functions.power_cntl;  in amdgpu_has_atpx_dgpu_power_cntl()
89 	return amdgpu_atpx_priv.atpx.is_hybrid;  in amdgpu_is_atpx_hybrid()
94 	return amdgpu_atpx_priv.atpx.dgpu_req_power_for_displays;  in amdgpu_atpx_dgpu_req_power_for_displays()
181 static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx)  in amdgpu_atpx_validate()  argument
185 	if (atpx->functions.px_params) {  in amdgpu_atpx_validate()
190 		info = amdgpu_atpx_call(atpx->handle, ATPX_FUNCTION_GET_PX_PARAMETERS, NULL);  in amdgpu_atpx_validate()
213 		atpx->functions.i2c_mux_cntl = true;  in amdgpu_atpx_validate()
214 		atpx->functions.disp_mux_cntl = true;  in amdgpu_atpx_validate()
220 		atpx->functions.disp_mux_cntl = true;  in amdgpu_atpx_validate()
226 		atpx->functions.power_cntl = true;  in amdgpu_atpx_validate()
228 	atpx->is_hybrid = false;  in amdgpu_atpx_validate()
232 			atpx->functions.power_cntl = true;  in amdgpu_atpx_validate()
233 			atpx->is_hybrid = false;  in amdgpu_atpx_validate()
240 			atpx->functions.power_cntl = !amdgpu_atpx_priv.bridge_pm_usable;  in amdgpu_atpx_validate()
241 			atpx->is_hybrid = true;  in amdgpu_atpx_validate()
245 	atpx->dgpu_req_power_for_displays = false;  in amdgpu_atpx_validate()
247 		atpx->dgpu_req_power_for_displays = true;  in amdgpu_atpx_validate()
262 static int amdgpu_atpx_verify_interface(struct amdgpu_atpx *atpx)  in amdgpu_atpx_verify_interface()  argument
269 	info = amdgpu_atpx_call(atpx->handle, ATPX_FUNCTION_VERIFY_INTERFACE, NULL);  in amdgpu_atpx_verify_interface()
289 	amdgpu_atpx_parse_functions(&atpx->functions, output.function_bits);  in amdgpu_atpx_verify_interface()
306 static int amdgpu_atpx_set_discrete_state(struct amdgpu_atpx *atpx, u8 state)  in amdgpu_atpx_set_discrete_state()  argument
312 	if (atpx->functions.power_cntl) {  in amdgpu_atpx_set_discrete_state()
317 		info = amdgpu_atpx_call(atpx->handle,  in amdgpu_atpx_set_discrete_state()
342 static int amdgpu_atpx_switch_disp_mux(struct amdgpu_atpx *atpx, u16 mux_id)  in amdgpu_atpx_switch_disp_mux()  argument
348 	if (atpx->functions.disp_mux_cntl) {  in amdgpu_atpx_switch_disp_mux()
353 		info = amdgpu_atpx_call(atpx->handle,  in amdgpu_atpx_switch_disp_mux()
374 static int amdgpu_atpx_switch_i2c_mux(struct amdgpu_atpx *atpx, u16 mux_id)  in amdgpu_atpx_switch_i2c_mux()  argument
380 	if (atpx->functions.i2c_mux_cntl) {  in amdgpu_atpx_switch_i2c_mux()
385 		info = amdgpu_atpx_call(atpx->handle,  in amdgpu_atpx_switch_i2c_mux()
406 static int amdgpu_atpx_switch_start(struct amdgpu_atpx *atpx, u16 mux_id)  in amdgpu_atpx_switch_start()  argument
412 	if (atpx->functions.switch_start) {  in amdgpu_atpx_switch_start()
417 		info = amdgpu_atpx_call(atpx->handle,  in amdgpu_atpx_switch_start()
438 static int amdgpu_atpx_switch_end(struct amdgpu_atpx *atpx, u16 mux_id)  in amdgpu_atpx_switch_end()  argument
444 	if (atpx->functions.switch_end) {  in amdgpu_atpx_switch_end()
449 		info = amdgpu_atpx_call(atpx->handle,  in amdgpu_atpx_switch_end()
477 	amdgpu_atpx_switch_start(&amdgpu_atpx_priv.atpx, gpu_id);  in amdgpu_atpx_switchto()
478 	amdgpu_atpx_switch_disp_mux(&amdgpu_atpx_priv.atpx, gpu_id);  in amdgpu_atpx_switchto()
479 	amdgpu_atpx_switch_i2c_mux(&amdgpu_atpx_priv.atpx, gpu_id);  in amdgpu_atpx_switchto()
480 	amdgpu_atpx_switch_end(&amdgpu_atpx_priv.atpx, gpu_id);  in amdgpu_atpx_switchto()
502 	amdgpu_atpx_set_discrete_state(&amdgpu_atpx_priv.atpx, state);  in amdgpu_atpx_power_state()
529 	amdgpu_atpx_priv.atpx.handle = atpx_handle;  in amdgpu_atpx_pci_probe_handle()
544 	r = amdgpu_atpx_verify_interface(&amdgpu_atpx_priv.atpx);  in amdgpu_atpx_init()
549 	r = amdgpu_atpx_validate(&amdgpu_atpx_priv.atpx);  in amdgpu_atpx_init()
643 		acpi_get_name(amdgpu_atpx_priv.atpx.handle, ACPI_FULL_PATHNAME, &buffer);  in amdgpu_atpx_detect()