Lines Matching +full:dual +full:- +full:direction
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2008 - 2013 Xilinx, Inc.
25 #define XGPIO_TRI_OFFSET (0x4) /* I/O direction register */
45 * struct xgpio_instance - Stores information about GPIO device
52 * @dir: GPIO direction shadow register
79 return bitmap_bitremap(bit, chip->hw_map, chip->sw_map, 64); in xgpio_from_bit()
84 return bitmap_bitremap(gpio, chip->sw_map, chip->hw_map, 64); in xgpio_to_bit()
112 return -EINVAL; in xgpio_regoffset()
118 void __iomem *addr = chip->regs + reg + xgpio_regoffset(chip, bit / 32); in xgpio_read_ch()
125 void __iomem *addr = chip->regs + reg + xgpio_regoffset(chip, bit / 32); in xgpio_write_ch()
132 int bit, lastbit = xgpio_to_bit(chip, chip->gc.ngpio - 1); in xgpio_read_ch_all()
140 int bit, lastbit = xgpio_to_bit(chip, chip->gc.ngpio - 1); in xgpio_write_ch_all()
147 * xgpio_get - Read the specified signal of the GPIO device.
154 * 0 if direction of GPIO signals is set as input otherwise it
169 * xgpio_set - Write the specified signal of the GPIO device.
183 spin_lock_irqsave(&chip->gpio_lock, flags); in xgpio_set()
185 /* Write to GPIO signal and set its direction to output */ in xgpio_set()
186 __assign_bit(bit, chip->state, val); in xgpio_set()
188 xgpio_write_ch(chip, XGPIO_DATA_OFFSET, bit, chip->state); in xgpio_set()
190 spin_unlock_irqrestore(&chip->gpio_lock, flags); in xgpio_set()
194 * xgpio_set_multiple - Write the specified signals of the GPIO device.
211 bitmap_remap(hw_mask, mask, chip->sw_map, chip->hw_map, 64); in xgpio_set_multiple()
212 bitmap_remap(hw_bits, bits, chip->sw_map, chip->hw_map, 64); in xgpio_set_multiple()
214 spin_lock_irqsave(&chip->gpio_lock, flags); in xgpio_set_multiple()
216 bitmap_replace(state, chip->state, hw_bits, hw_mask, 64); in xgpio_set_multiple()
220 bitmap_copy(chip->state, state, 64); in xgpio_set_multiple()
222 spin_unlock_irqrestore(&chip->gpio_lock, flags); in xgpio_set_multiple()
226 * xgpio_dir_in - Set the direction of the specified GPIO signal as input.
231 * 0 - if direction of GPIO signals is set as input
240 spin_lock_irqsave(&chip->gpio_lock, flags); in xgpio_dir_in()
242 /* Set the GPIO bit in shadow register and set direction as input */ in xgpio_dir_in()
243 __set_bit(bit, chip->dir); in xgpio_dir_in()
244 xgpio_write_ch(chip, XGPIO_TRI_OFFSET, bit, chip->dir); in xgpio_dir_in()
246 spin_unlock_irqrestore(&chip->gpio_lock, flags); in xgpio_dir_in()
252 * xgpio_dir_out - Set the direction of the specified GPIO signal as output.
257 * This function sets the direction of specified GPIO signal as output.
269 spin_lock_irqsave(&chip->gpio_lock, flags); in xgpio_dir_out()
272 __assign_bit(bit, chip->state, val); in xgpio_dir_out()
273 xgpio_write_ch(chip, XGPIO_DATA_OFFSET, bit, chip->state); in xgpio_dir_out()
275 /* Clear the GPIO bit in shadow register and set direction as output */ in xgpio_dir_out()
276 __clear_bit(bit, chip->dir); in xgpio_dir_out()
277 xgpio_write_ch(chip, XGPIO_TRI_OFFSET, bit, chip->dir); in xgpio_dir_out()
279 spin_unlock_irqrestore(&chip->gpio_lock, flags); in xgpio_dir_out()
285 * xgpio_save_regs - Set initial values of GPIO pins
290 xgpio_write_ch_all(chip, XGPIO_DATA_OFFSET, chip->state); in xgpio_save_regs()
291 xgpio_write_ch_all(chip, XGPIO_TRI_OFFSET, chip->dir); in xgpio_save_regs()
298 ret = pm_runtime_get_sync(chip->parent); in xgpio_request()
308 pm_runtime_put(chip->parent); in xgpio_free()
314 struct irq_data *data = irq_get_irq_data(gpio->irq); in xgpio_suspend()
328 * xgpio_remove - Remove method for the GPIO device.
339 pm_runtime_get_sync(&pdev->dev); in xgpio_remove()
340 pm_runtime_put_noidle(&pdev->dev); in xgpio_remove()
341 pm_runtime_disable(&pdev->dev); in xgpio_remove()
342 clk_disable_unprepare(gpio->clk); in xgpio_remove()
348 * xgpio_irq_ack - Acknowledge a child GPIO interrupt.
360 struct irq_data *data = irq_get_irq_data(gpio->irq); in xgpio_resume()
377 clk_disable(gpio->clk); in xgpio_runtime_suspend()
386 return clk_enable(gpio->clk); in xgpio_runtime_resume()
396 * xgpio_irq_mask - Write the specified signal of the GPIO device.
407 spin_lock_irqsave(&chip->gpio_lock, flags); in xgpio_irq_mask()
409 __clear_bit(bit, chip->enable); in xgpio_irq_mask()
411 if (xgpio_get_value32(chip->enable, bit) == 0) { in xgpio_irq_mask()
413 temp = xgpio_readreg(chip->regs + XGPIO_IPIER_OFFSET); in xgpio_irq_mask()
415 xgpio_writereg(chip->regs + XGPIO_IPIER_OFFSET, temp); in xgpio_irq_mask()
417 spin_unlock_irqrestore(&chip->gpio_lock, flags); in xgpio_irq_mask()
419 gpiochip_disable_irq(&chip->gc, irq_offset); in xgpio_irq_mask()
423 * xgpio_irq_unmask - Write the specified signal of the GPIO device.
432 u32 old_enable = xgpio_get_value32(chip->enable, bit); in xgpio_irq_unmask()
435 gpiochip_enable_irq(&chip->gc, irq_offset); in xgpio_irq_unmask()
437 spin_lock_irqsave(&chip->gpio_lock, flags); in xgpio_irq_unmask()
439 __set_bit(bit, chip->enable); in xgpio_irq_unmask()
442 /* Clear any existing per-channel interrupts */ in xgpio_irq_unmask()
443 val = xgpio_readreg(chip->regs + XGPIO_IPISR_OFFSET); in xgpio_irq_unmask()
445 xgpio_writereg(chip->regs + XGPIO_IPISR_OFFSET, val); in xgpio_irq_unmask()
448 xgpio_read_ch(chip, XGPIO_DATA_OFFSET, bit, chip->last_irq_read); in xgpio_irq_unmask()
451 val = xgpio_readreg(chip->regs + XGPIO_IPIER_OFFSET); in xgpio_irq_unmask()
453 xgpio_writereg(chip->regs + XGPIO_IPIER_OFFSET, val); in xgpio_irq_unmask()
456 spin_unlock_irqrestore(&chip->gpio_lock, flags); in xgpio_irq_unmask()
460 * xgpio_set_irq_type - Write the specified signal of the GPIO device.
465 * 0 if interrupt type is supported otherwise -EINVAL
481 __set_bit(bit, chip->rising_edge); in xgpio_set_irq_type()
482 __set_bit(bit, chip->falling_edge); in xgpio_set_irq_type()
485 __set_bit(bit, chip->rising_edge); in xgpio_set_irq_type()
486 __clear_bit(bit, chip->falling_edge); in xgpio_set_irq_type()
489 __clear_bit(bit, chip->rising_edge); in xgpio_set_irq_type()
490 __set_bit(bit, chip->falling_edge); in xgpio_set_irq_type()
493 return -EINVAL; in xgpio_set_irq_type()
501 * xgpio_irqhandler - Gpio interrupt service routine
507 struct gpio_chip *gc = &chip->gc; in xgpio_irqhandler()
516 status = xgpio_readreg(chip->regs + XGPIO_IPISR_OFFSET); in xgpio_irqhandler()
517 xgpio_writereg(chip->regs + XGPIO_IPISR_OFFSET, status); in xgpio_irqhandler()
521 spin_lock(&chip->gpio_lock); in xgpio_irqhandler()
525 bitmap_complement(rising, chip->last_irq_read, 64); in xgpio_irqhandler()
527 bitmap_and(rising, rising, chip->enable, 64); in xgpio_irqhandler()
528 bitmap_and(rising, rising, chip->rising_edge, 64); in xgpio_irqhandler()
531 bitmap_and(falling, falling, chip->last_irq_read, 64); in xgpio_irqhandler()
532 bitmap_and(falling, falling, chip->enable, 64); in xgpio_irqhandler()
533 bitmap_and(falling, falling, chip->falling_edge, 64); in xgpio_irqhandler()
535 bitmap_copy(chip->last_irq_read, all, 64); in xgpio_irqhandler()
538 spin_unlock(&chip->gpio_lock); in xgpio_irqhandler()
540 dev_dbg(gc->parent, "IRQ rising %*pb falling %*pb\n", 64, rising, 64, falling); in xgpio_irqhandler()
544 generic_handle_domain_irq(gc->irq.domain, irq_offset); in xgpio_irqhandler()
551 .name = "gpio-xilinx",
561 * xgpio_probe - Probe method for the GPIO device.
572 struct device_node *np = pdev->dev.of_node; in xgpio_probe()
580 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); in xgpio_probe()
582 return -ENOMEM; in xgpio_probe()
586 /* First, check if the device is dual-channel */ in xgpio_probe()
587 of_property_read_u32(np, "xlnx,is-dual", &is_dual); in xgpio_probe()
595 of_property_read_u32(np, "xlnx,dout-default", &state[0]); in xgpio_probe()
596 of_property_read_u32(np, "xlnx,dout-default-2", &state[1]); in xgpio_probe()
598 bitmap_from_arr32(chip->state, state, 64); in xgpio_probe()
600 /* Update GPIO direction shadow register with default value */ in xgpio_probe()
601 of_property_read_u32(np, "xlnx,tri-default", &dir[0]); in xgpio_probe()
602 of_property_read_u32(np, "xlnx,tri-default-2", &dir[1]); in xgpio_probe()
604 bitmap_from_arr32(chip->dir, dir, 64); in xgpio_probe()
610 if (of_property_read_u32(np, "xlnx,gpio-width", &width[0])) in xgpio_probe()
614 return -EINVAL; in xgpio_probe()
616 if (is_dual && of_property_read_u32(np, "xlnx,gpio2-width", &width[1])) in xgpio_probe()
620 return -EINVAL; in xgpio_probe()
623 bitmap_set(chip->sw_map, 0, width[0] + width[1]); in xgpio_probe()
626 bitmap_set(chip->hw_map, 0, width[0]); in xgpio_probe()
627 bitmap_set(chip->hw_map, 32, width[1]); in xgpio_probe()
629 spin_lock_init(&chip->gpio_lock); in xgpio_probe()
631 chip->gc.base = -1; in xgpio_probe()
632 chip->gc.ngpio = bitmap_weight(chip->hw_map, 64); in xgpio_probe()
633 chip->gc.parent = &pdev->dev; in xgpio_probe()
634 chip->gc.direction_input = xgpio_dir_in; in xgpio_probe()
635 chip->gc.direction_output = xgpio_dir_out; in xgpio_probe()
636 chip->gc.get = xgpio_get; in xgpio_probe()
637 chip->gc.set = xgpio_set; in xgpio_probe()
638 chip->gc.request = xgpio_request; in xgpio_probe()
639 chip->gc.free = xgpio_free; in xgpio_probe()
640 chip->gc.set_multiple = xgpio_set_multiple; in xgpio_probe()
642 chip->gc.label = dev_name(&pdev->dev); in xgpio_probe()
644 chip->regs = devm_platform_ioremap_resource(pdev, 0); in xgpio_probe()
645 if (IS_ERR(chip->regs)) { in xgpio_probe()
646 dev_err(&pdev->dev, "failed to ioremap memory resource\n"); in xgpio_probe()
647 return PTR_ERR(chip->regs); in xgpio_probe()
650 chip->clk = devm_clk_get_optional(&pdev->dev, NULL); in xgpio_probe()
651 if (IS_ERR(chip->clk)) in xgpio_probe()
652 return dev_err_probe(&pdev->dev, PTR_ERR(chip->clk), "input clock not found.\n"); in xgpio_probe()
654 status = clk_prepare_enable(chip->clk); in xgpio_probe()
656 dev_err(&pdev->dev, "Failed to prepare clk\n"); in xgpio_probe()
659 pm_runtime_get_noresume(&pdev->dev); in xgpio_probe()
660 pm_runtime_set_active(&pdev->dev); in xgpio_probe()
661 pm_runtime_enable(&pdev->dev); in xgpio_probe()
665 chip->irq = platform_get_irq_optional(pdev, 0); in xgpio_probe()
666 if (chip->irq <= 0) in xgpio_probe()
669 /* Disable per-channel interrupts */ in xgpio_probe()
670 xgpio_writereg(chip->regs + XGPIO_IPIER_OFFSET, 0); in xgpio_probe()
671 /* Clear any existing per-channel interrupts */ in xgpio_probe()
672 temp = xgpio_readreg(chip->regs + XGPIO_IPISR_OFFSET); in xgpio_probe()
673 xgpio_writereg(chip->regs + XGPIO_IPISR_OFFSET, temp); in xgpio_probe()
675 xgpio_writereg(chip->regs + XGPIO_GIER_OFFSET, XGPIO_GIER_IE); in xgpio_probe()
677 girq = &chip->gc.irq; in xgpio_probe()
679 girq->parent_handler = xgpio_irqhandler; in xgpio_probe()
680 girq->num_parents = 1; in xgpio_probe()
681 girq->parents = devm_kcalloc(&pdev->dev, 1, in xgpio_probe()
682 sizeof(*girq->parents), in xgpio_probe()
684 if (!girq->parents) { in xgpio_probe()
685 status = -ENOMEM; in xgpio_probe()
688 girq->parents[0] = chip->irq; in xgpio_probe()
689 girq->default_type = IRQ_TYPE_NONE; in xgpio_probe()
690 girq->handler = handle_bad_irq; in xgpio_probe()
693 status = devm_gpiochip_add_data(&pdev->dev, &chip->gc, chip); in xgpio_probe()
695 dev_err(&pdev->dev, "failed to add GPIO chip\n"); in xgpio_probe()
699 pm_runtime_put(&pdev->dev); in xgpio_probe()
703 pm_runtime_disable(&pdev->dev); in xgpio_probe()
704 pm_runtime_put_noidle(&pdev->dev); in xgpio_probe()
705 clk_disable_unprepare(chip->clk); in xgpio_probe()
710 { .compatible = "xlnx,xps-gpio-1.00.a", },
720 .name = "gpio-xilinx",