91 	struct ichx_desc *desc;	/* Pointer to chipset-specific description */  member
110 	if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache)  in ichx_write_bit()
113 		data = ICHX_READ(ichx_priv.desc->regs[reg][reg_nr],  in ichx_write_bit()
120 	ICHX_WRITE(data, ichx_priv.desc->regs[reg][reg_nr],  in ichx_write_bit()
122 	if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache)  in ichx_write_bit()
125 	tmp = ICHX_READ(ichx_priv.desc->regs[reg][reg_nr],  in ichx_write_bit()
142 	data = ICHX_READ(ichx_priv.desc->regs[reg][reg_nr],  in ichx_read_bit()
145 	if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache)  in ichx_read_bit()
179 	if (nr < 32 && ichx_priv.desc->have_blink)  in ichx_gpio_direction_output()
235 	if (ichx_priv.desc->use_sel_ignore[nr / 32] & BIT(nr & 0x1f))  in ichx_gpio_request()
267 	chip->request = ichx_priv.desc->request ?  in ichx_gpiolib_setup()
268 		ichx_priv.desc->request : ichx_gpio_request;  in ichx_gpiolib_setup()
269 	chip->get = ichx_priv.desc->get ?  in ichx_gpiolib_setup()
270 		ichx_priv.desc->get : ichx_gpio_get;  in ichx_gpiolib_setup()
277 	chip->ngpio = ichx_priv.desc->ngpio;  in ichx_gpiolib_setup()
374 	for (i = 0; i < ARRAY_SIZE(ichx_priv.desc->regs[0]); i++) {  in ichx_gpio_request_regions()
378 				res_base->start + ichx_priv.desc->regs[0][i],  in ichx_gpio_request_regions()
379 				ichx_priv.desc->reglen[i], name))  in ichx_gpio_request_regions()
397 		ichx_priv.desc = &i3100_desc;  in ichx_gpio_probe()
400 		ichx_priv.desc = &intel5_desc;  in ichx_gpio_probe()
403 		ichx_priv.desc = &ich6_desc;  in ichx_gpio_probe()
406 		ichx_priv.desc = &ich7_desc;  in ichx_gpio_probe()
409 		ichx_priv.desc = &ich9_desc;  in ichx_gpio_probe()
412 		ichx_priv.desc = &ich10_corp_desc;  in ichx_gpio_probe()
415 		ichx_priv.desc = &ich10_cons_desc;  in ichx_gpio_probe()
418 		ichx_priv.desc = &avoton_desc;  in ichx_gpio_probe()
441 	if (!ichx_priv.desc->uses_gpe0)  in ichx_gpio_probe()