195 	struct davinci_gpio_controller *chips;  in davinci_gpio_probe()  local
233 	chips = devm_kzalloc(dev, sizeof(*chips), GFP_KERNEL);  in davinci_gpio_probe()
234 	if (!chips)  in davinci_gpio_probe()
242 		chips->irqs[i] = platform_get_irq(pdev, i);  in davinci_gpio_probe()
243 		if (chips->irqs[i] < 0)  in davinci_gpio_probe()
244 			return chips->irqs[i];  in davinci_gpio_probe()
247 	chips->chip.label = dev_name(dev);  in davinci_gpio_probe()
249 	chips->chip.direction_input = davinci_direction_in;  in davinci_gpio_probe()
250 	chips->chip.get = davinci_gpio_get;  in davinci_gpio_probe()
251 	chips->chip.direction_output = davinci_direction_out;  in davinci_gpio_probe()
252 	chips->chip.set = davinci_gpio_set;  in davinci_gpio_probe()
254 	chips->chip.ngpio = ngpio;  in davinci_gpio_probe()
255 	chips->chip.base = pdata->no_auto_base ? pdata->base : -1;  in davinci_gpio_probe()
258 	chips->chip.parent = dev;  in davinci_gpio_probe()
259 	chips->chip.request = gpiochip_generic_request;  in davinci_gpio_probe()
260 	chips->chip.free = gpiochip_generic_free;  in davinci_gpio_probe()
262 	spin_lock_init(&chips->lock);  in davinci_gpio_probe()
266 		chips->regs[bank] = gpio_base + offset_array[bank];  in davinci_gpio_probe()
268 	ret = devm_gpiochip_add_data(dev, &chips->chip, chips);  in davinci_gpio_probe()
272 	platform_set_drvdata(pdev, chips);  in davinci_gpio_probe()
436 	struct davinci_gpio_controller *chips =  in davinci_gpio_irq_map()  local
438 	struct davinci_gpio_regs __iomem *g = chips->regs[hw / 32];  in davinci_gpio_irq_map()
490 	struct davinci_gpio_controller *chips = platform_get_drvdata(pdev);  in davinci_gpio_irq_setup()  local
530 							chips);  in davinci_gpio_irq_setup()
544 	chips->chip.to_irq = gpio_to_irq_banked;  in davinci_gpio_irq_setup()
545 	chips->irq_domain = irq_domain;  in davinci_gpio_irq_setup()
554 		chips->chip.to_irq = gpio_to_irq_unbanked;  in davinci_gpio_irq_setup()
555 		chips->gpio_unbanked = pdata->gpio_unbanked;  in davinci_gpio_irq_setup()
559 		irq = chips->irqs[0];  in davinci_gpio_irq_setup()
565 		g = chips->regs[0];  in davinci_gpio_irq_setup()
571 			irq_set_chip(chips->irqs[gpio], irq_chip);  in davinci_gpio_irq_setup()
572 			irq_set_handler_data(chips->irqs[gpio], chips);  in davinci_gpio_irq_setup()
573 			irq_set_status_flags(chips->irqs[gpio],  in davinci_gpio_irq_setup()
589 		g = chips->regs[bank / 2];  in davinci_gpio_irq_setup()
609 		irqdata->chip = chips;  in davinci_gpio_irq_setup()
611 		irq_set_chained_handler_and_data(chips->irqs[bank],  in davinci_gpio_irq_setup()
627 static void davinci_gpio_save_context(struct davinci_gpio_controller *chips,  in davinci_gpio_save_context()  argument
635 	base = chips->regs[0] - offset_array[0];  in davinci_gpio_save_context()
636 	chips->binten_context = readl_relaxed(base + BINTEN);  in davinci_gpio_save_context()
639 		g = chips->regs[bank];  in davinci_gpio_save_context()
640 		context = &chips->context[bank];  in davinci_gpio_save_context()
651 static void davinci_gpio_restore_context(struct davinci_gpio_controller *chips,  in davinci_gpio_restore_context()  argument
659 	base = chips->regs[0] - offset_array[0];  in davinci_gpio_restore_context()
661 	if (readl_relaxed(base + BINTEN) != chips->binten_context)  in davinci_gpio_restore_context()
662 		writel_relaxed(chips->binten_context, base + BINTEN);  in davinci_gpio_restore_context()
665 		g = chips->regs[bank];  in davinci_gpio_restore_context()
666 		context = &chips->context[bank];  in davinci_gpio_restore_context()
680 	struct davinci_gpio_controller *chips = dev_get_drvdata(dev);  in davinci_gpio_suspend()  local
684 	davinci_gpio_save_context(chips, nbank);  in davinci_gpio_suspend()
691 	struct davinci_gpio_controller *chips = dev_get_drvdata(dev);  in davinci_gpio_resume()  local
695 	davinci_gpio_restore_context(chips, nbank);  in davinci_gpio_resume()