44 	struct mgr_stats stats;  member
77 	struct mgr_stats *stats = mgr->priv;  in op_parse_header()  local
80 	stats->op_parse_header_state = mgr->state;  in op_parse_header()
81 	stats->op_parse_header_seq = stats->seq_num++;  in op_parse_header()
87 	stats->header_match = true;  in op_parse_header()
90 			stats->header_match = false;  in op_parse_header()
101 	struct mgr_stats *stats = mgr->priv;  in op_write_init()  local
103 	stats->op_write_init_state = mgr->state;  in op_write_init()
104 	stats->op_write_init_seq = stats->seq_num++;  in op_write_init()
115 	struct mgr_stats *stats = mgr->priv;  in op_write()  local
118 	stats->op_write_state = mgr->state;  in op_write()
119 	stats->op_write_seq = stats->seq_num++;  in op_write()
121 	stats->image_match = true;  in op_write()
124 			stats->image_match = false;  in op_write()
139 	struct mgr_stats *stats = mgr->priv;  in op_write_sg()  local
144 	stats->op_write_sg_state = mgr->state;  in op_write_sg()
145 	stats->op_write_sg_seq = stats->seq_num++;  in op_write_sg()
147 	stats->image_match = true;  in op_write_sg()
151 		stats->image_match = false;  in op_write_sg()
159 				stats->image_match = false;  in op_write_sg()
171 	struct mgr_stats *stats = mgr->priv;  in op_write_complete()  local
173 	stats->op_write_complete_state = mgr->state;  in op_write_complete()
174 	stats->op_write_complete_seq = stats->seq_num++;  in op_write_complete()
232 	KUNIT_EXPECT_TRUE(test, ctx->stats.header_match);  in fpga_mgr_test_img_load_buf()
233 	KUNIT_EXPECT_TRUE(test, ctx->stats.image_match);  in fpga_mgr_test_img_load_buf()
235 	KUNIT_EXPECT_EQ(test, ctx->stats.op_parse_header_state, FPGA_MGR_STATE_PARSE_HEADER);  in fpga_mgr_test_img_load_buf()
236 	KUNIT_EXPECT_EQ(test, ctx->stats.op_write_init_state, FPGA_MGR_STATE_WRITE_INIT);  in fpga_mgr_test_img_load_buf()
237 	KUNIT_EXPECT_EQ(test, ctx->stats.op_write_state, FPGA_MGR_STATE_WRITE);  in fpga_mgr_test_img_load_buf()
238 	KUNIT_EXPECT_EQ(test, ctx->stats.op_write_complete_state, FPGA_MGR_STATE_WRITE_COMPLETE);  in fpga_mgr_test_img_load_buf()
240 	KUNIT_EXPECT_EQ(test, ctx->stats.op_write_init_seq, ctx->stats.op_parse_header_seq + 1);  in fpga_mgr_test_img_load_buf()
241 	KUNIT_EXPECT_EQ(test, ctx->stats.op_write_seq, ctx->stats.op_parse_header_seq + 2);  in fpga_mgr_test_img_load_buf()
242 	KUNIT_EXPECT_EQ(test, ctx->stats.op_write_complete_seq, ctx->stats.op_parse_header_seq + 3);  in fpga_mgr_test_img_load_buf()
265 	KUNIT_EXPECT_TRUE(test, ctx->stats.header_match);  in fpga_mgr_test_img_load_sgt()
266 	KUNIT_EXPECT_TRUE(test, ctx->stats.image_match);  in fpga_mgr_test_img_load_sgt()
268 	KUNIT_EXPECT_EQ(test, ctx->stats.op_parse_header_state, FPGA_MGR_STATE_PARSE_HEADER);  in fpga_mgr_test_img_load_sgt()
269 	KUNIT_EXPECT_EQ(test, ctx->stats.op_write_init_state, FPGA_MGR_STATE_WRITE_INIT);  in fpga_mgr_test_img_load_sgt()
270 	KUNIT_EXPECT_EQ(test, ctx->stats.op_write_sg_state, FPGA_MGR_STATE_WRITE);  in fpga_mgr_test_img_load_sgt()
271 	KUNIT_EXPECT_EQ(test, ctx->stats.op_write_complete_state, FPGA_MGR_STATE_WRITE_COMPLETE);  in fpga_mgr_test_img_load_sgt()
273 	KUNIT_EXPECT_EQ(test, ctx->stats.op_write_init_seq, ctx->stats.op_parse_header_seq + 1);  in fpga_mgr_test_img_load_sgt()
274 	KUNIT_EXPECT_EQ(test, ctx->stats.op_write_sg_seq, ctx->stats.op_parse_header_seq + 2);  in fpga_mgr_test_img_load_sgt()
275 	KUNIT_EXPECT_EQ(test, ctx->stats.op_write_complete_seq, ctx->stats.op_parse_header_seq + 3);  in fpga_mgr_test_img_load_sgt()
291 					  &ctx->stats);  in fpga_mgr_test_init()