1 // SPDX-License-Identifier: GPL-2.0
3  * FPGA Manager Driver for Intel Stratix10 SoC
8 #include <linux/fpga/fpga-mgr.h>
9 #include <linux/firmware/intel/stratix10-svc-client.h>
16  * FPGA programming requires a higher level of privilege (EL3), per the SoC
50 	struct stratix10_svc_chan *chan = priv->chan;  in s10_svc_send_msg()
51 	struct device *dev = priv->client.dev;  in s10_svc_send_msg()
74 	struct s10_priv *priv = mgr->priv;  in s10_free_buffers()
79 		if (!priv->svc_bufs[i].buf) {  in s10_free_buffers()
85 					   &priv->svc_bufs[i].lock)) {  in s10_free_buffers()
86 			stratix10_svc_free_memory(priv->chan,  in s10_free_buffers()
87 						  priv->svc_bufs[i].buf);  in s10_free_buffers()
88 			priv->svc_bufs[i].buf = NULL;  in s10_free_buffers()
101 	struct s10_priv *priv = mgr->priv;  in s10_free_buffer_count()
106 		if (!priv->svc_bufs[i].buf)  in s10_free_buffer_count()
128 		if (priv->svc_bufs[i].buf == kaddr) {  in s10_unlock_bufs()
130 					 &priv->svc_bufs[i].lock);  in s10_unlock_bufs()
134 	WARN(1, "Unknown buffer returned from service layer %p\n", kaddr);  in s10_unlock_bufs()
138  * s10_receive_callback - callback for service layer to use to provide client
146 	struct s10_priv *priv = client->priv;  in s10_receive_callback()
152 	status = data->status;  in s10_receive_callback()
156 	 * test_and_clear_bit() to check status in priv->status  in s10_receive_callback()
160 			set_bit(i, &priv->status);  in s10_receive_callback()
163 		s10_unlock_bufs(priv, data->kaddr1);  in s10_receive_callback()
164 		s10_unlock_bufs(priv, data->kaddr2);  in s10_receive_callback()
165 		s10_unlock_bufs(priv, data->kaddr3);  in s10_receive_callback()
168 	complete(&priv->status_return_completion);  in s10_receive_callback()
172  * s10_ops_write_init - prepare for FPGA reconfiguration by requesting
179 	struct s10_priv *priv = mgr->priv;  in s10_ops_write_init()
180 	struct device *dev = priv->client.dev;  in s10_ops_write_init()
187 	if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) {  in s10_ops_write_init()
194 	reinit_completion(&priv->status_return_completion);  in s10_ops_write_init()
201 		&priv->status_return_completion, S10_RECONFIG_TIMEOUT);  in s10_ops_write_init()
204 		ret = -ETIMEDOUT;  in s10_ops_write_init()
209 	if (!test_and_clear_bit(SVC_STATUS_OK, &priv->status)) {  in s10_ops_write_init()
210 		ret = -ETIMEDOUT;  in s10_ops_write_init()
216 		kbuf = stratix10_svc_allocate_memory(priv->chan, SVC_BUF_SIZE);  in s10_ops_write_init()
223 		priv->svc_bufs[i].buf = kbuf;  in s10_ops_write_init()
224 		priv->svc_bufs[i].lock = 0;  in s10_ops_write_init()
228 	stratix10_svc_done(priv->chan);  in s10_ops_write_init()
233  * s10_send_buf - send a buffer to the service layer queue
237  * Returns # of bytes transferred or -ENOBUFS if the all the buffers are in use
242 	struct s10_priv *priv = mgr->priv;  in s10_send_buf()
243 	struct device *dev = priv->client.dev;  in s10_send_buf()
252 					   &priv->svc_bufs[i].lock))  in s10_send_buf()
256 		return -ENOBUFS;  in s10_send_buf()
260 	svc_buf = priv->svc_bufs[i].buf;  in s10_send_buf()
267 		clear_bit_unlock(SVC_BUF_LOCK, &priv->svc_bufs[i].lock);  in s10_send_buf()
281 	struct s10_priv *priv = mgr->priv;  in s10_ops_write()
282 	struct device *dev = priv->client.dev;  in s10_ops_write()
292 		reinit_completion(&priv->status_return_completion);  in s10_ops_write()
299 			count -= sent;  in s10_ops_write()
317 		if (!priv->status)  in s10_ops_write()
319 				&priv->status_return_completion,  in s10_ops_write()
322 		if (test_and_clear_bit(SVC_STATUS_BUFFER_DONE, &priv->status) ||  in s10_ops_write()
324 				       &priv->status)) {  in s10_ops_write()
329 		if (test_and_clear_bit(SVC_STATUS_ERROR, &priv->status)) {  in s10_ops_write()
330 			dev_err(dev, "ERROR - giving up - SVC_STATUS_ERROR\n");  in s10_ops_write()
331 			ret = -EFAULT;  in s10_ops_write()
337 			ret = -ETIMEDOUT;  in s10_ops_write()
351 	struct s10_priv *priv = mgr->priv;  in s10_ops_write_complete()
352 	struct device *dev = priv->client.dev;  in s10_ops_write_complete()
356 	timeout = usecs_to_jiffies(info->config_complete_timeout_us);  in s10_ops_write_complete()
359 		reinit_completion(&priv->status_return_completion);  in s10_ops_write_complete()
366 			&priv->status_return_completion, timeout);  in s10_ops_write_complete()
370 			ret = -ETIMEDOUT;  in s10_ops_write_complete()
377 		if (test_and_clear_bit(SVC_STATUS_COMPLETED, &priv->status))  in s10_ops_write_complete()
380 		if (test_and_clear_bit(SVC_STATUS_ERROR, &priv->status)) {  in s10_ops_write_complete()
381 			dev_err(dev, "ERROR - giving up - SVC_STATUS_ERROR\n");  in s10_ops_write_complete()
382 			ret = -EFAULT;  in s10_ops_write_complete()
387 	stratix10_svc_done(priv->chan);  in s10_ops_write_complete()
400 	struct device *dev = &pdev->dev;  in s10_probe()
407 		return -ENOMEM;  in s10_probe()
409 	priv->client.dev = dev;  in s10_probe()
410 	priv->client.receive_cb = s10_receive_callback;  in s10_probe()
411 	priv->client.priv = priv;  in s10_probe()
413 	priv->chan = stratix10_svc_request_channel_byname(&priv->client,  in s10_probe()
415 	if (IS_ERR(priv->chan)) {  in s10_probe()
418 		return PTR_ERR(priv->chan);  in s10_probe()
421 	init_completion(&priv->status_return_completion);  in s10_probe()
423 	mgr = fpga_mgr_register(dev, "Stratix10 SOC FPGA Manager",  in s10_probe()
435 	stratix10_svc_free_channel(priv->chan);  in s10_probe()
442 	struct s10_priv *priv = mgr->priv;  in s10_remove()
445 	stratix10_svc_free_channel(priv->chan);  in s10_remove()
451 	{.compatible = "intel,stratix10-soc-fpga-mgr"},
452 	{.compatible = "intel,agilex-soc-fpga-mgr"},
462 		.name	= "Stratix10 SoC FPGA manager",
475 		return -ENODEV;  in s10_init()
481 		return -ENODEV;  in s10_init()
502 MODULE_DESCRIPTION("Intel Stratix 10 SOC FPGA Manager");