Lines Matching +full:dsp +full:- +full:config +full:- +full:name
1 // SPDX-License-Identifier: GPL-2.0-only
3 * cs_dsp.c -- Cirrus Logic DSP firmware support
8 * Copyright (C) 2015-2021 Cirrus Logic, Inc. and
25 dev_err(_dsp->dev, "%s: " fmt, _dsp->name, ##__VA_ARGS__)
27 dev_warn(_dsp->dev, "%s: " fmt, _dsp->name, ##__VA_ARGS__)
29 dev_info(_dsp->dev, "%s: " fmt, _dsp->name, ##__VA_ARGS__)
31 dev_dbg(_dsp->dev, "%s: " fmt, _dsp->name, ##__VA_ARGS__)
68 #define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
69 #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
70 #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
279 bool (*validate_version)(struct cs_dsp *dsp, unsigned int version);
280 unsigned int (*parse_sizes)(struct cs_dsp *dsp,
284 int (*setup_algs)(struct cs_dsp *dsp);
288 void (*show_fw_status)(struct cs_dsp *dsp);
289 void (*stop_watchdog)(struct cs_dsp *dsp);
291 int (*enable_memory)(struct cs_dsp *dsp);
292 void (*disable_memory)(struct cs_dsp *dsp);
293 int (*lock_memory)(struct cs_dsp *dsp, unsigned int lock_regions);
295 int (*enable_core)(struct cs_dsp *dsp);
296 void (*disable_core)(struct cs_dsp *dsp);
298 int (*start_core)(struct cs_dsp *dsp);
299 void (*stop_core)(struct cs_dsp *dsp);
320 buf->buf = vmalloc(len); in cs_dsp_buf_alloc()
321 if (!buf->buf) { in cs_dsp_buf_alloc()
325 memcpy(buf->buf, src, len); in cs_dsp_buf_alloc()
328 list_add_tail(&buf->list, list); in cs_dsp_buf_alloc()
339 list_del(&buf->list); in cs_dsp_buf_free()
340 vfree(buf->buf); in cs_dsp_buf_free()
346 * cs_dsp_mem_region_name() - Return a name string for a memory type
377 static void cs_dsp_debugfs_save_wmfwname(struct cs_dsp *dsp, const char *s) in cs_dsp_debugfs_save_wmfwname() argument
381 kfree(dsp->wmfw_file_name); in cs_dsp_debugfs_save_wmfwname()
382 dsp->wmfw_file_name = tmp; in cs_dsp_debugfs_save_wmfwname()
385 static void cs_dsp_debugfs_save_binname(struct cs_dsp *dsp, const char *s) in cs_dsp_debugfs_save_binname() argument
389 kfree(dsp->bin_file_name); in cs_dsp_debugfs_save_binname()
390 dsp->bin_file_name = tmp; in cs_dsp_debugfs_save_binname()
393 static void cs_dsp_debugfs_clear(struct cs_dsp *dsp) in cs_dsp_debugfs_clear() argument
395 kfree(dsp->wmfw_file_name); in cs_dsp_debugfs_clear()
396 kfree(dsp->bin_file_name); in cs_dsp_debugfs_clear()
397 dsp->wmfw_file_name = NULL; in cs_dsp_debugfs_clear()
398 dsp->bin_file_name = NULL; in cs_dsp_debugfs_clear()
405 struct cs_dsp *dsp = file->private_data; in cs_dsp_debugfs_wmfw_read() local
408 mutex_lock(&dsp->pwr_lock); in cs_dsp_debugfs_wmfw_read()
410 if (!dsp->wmfw_file_name || !dsp->booted) in cs_dsp_debugfs_wmfw_read()
414 dsp->wmfw_file_name, in cs_dsp_debugfs_wmfw_read()
415 strlen(dsp->wmfw_file_name)); in cs_dsp_debugfs_wmfw_read()
417 mutex_unlock(&dsp->pwr_lock); in cs_dsp_debugfs_wmfw_read()
425 struct cs_dsp *dsp = file->private_data; in cs_dsp_debugfs_bin_read() local
428 mutex_lock(&dsp->pwr_lock); in cs_dsp_debugfs_bin_read()
430 if (!dsp->bin_file_name || !dsp->booted) in cs_dsp_debugfs_bin_read()
434 dsp->bin_file_name, in cs_dsp_debugfs_bin_read()
435 strlen(dsp->bin_file_name)); in cs_dsp_debugfs_bin_read()
437 mutex_unlock(&dsp->pwr_lock); in cs_dsp_debugfs_bin_read()
442 const char *name; member
446 .name = "wmfw_file_name",
453 .name = "bin_file_name",
466 struct cs_dsp *dsp = s->private; in cs_dsp_debugfs_read_controls_show() local
470 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_debugfs_read_controls_show()
473 ctl->subname_len, ctl->subname, ctl->len, in cs_dsp_debugfs_read_controls_show()
474 cs_dsp_mem_region_name(ctl->alg_region.type), in cs_dsp_debugfs_read_controls_show()
475 ctl->offset, reg, ctl->fw_name, ctl->alg_region.alg, ctl->type, in cs_dsp_debugfs_read_controls_show()
476 ctl->flags & WMFW_CTL_FLAG_VOLATILE ? 'V' : '-', in cs_dsp_debugfs_read_controls_show()
477 ctl->flags & WMFW_CTL_FLAG_SYS ? 'S' : '-', in cs_dsp_debugfs_read_controls_show()
478 ctl->flags & WMFW_CTL_FLAG_READABLE ? 'R' : '-', in cs_dsp_debugfs_read_controls_show()
479 ctl->flags & WMFW_CTL_FLAG_WRITEABLE ? 'W' : '-', in cs_dsp_debugfs_read_controls_show()
480 ctl->enabled ? "enabled" : "disabled", in cs_dsp_debugfs_read_controls_show()
481 ctl->set ? "dirty" : "clean"); in cs_dsp_debugfs_read_controls_show()
489 * cs_dsp_init_debugfs() - Create and populate DSP representation in debugfs
490 * @dsp: pointer to DSP structure
491 * @debugfs_root: pointer to debugfs directory in which to create this DSP
494 void cs_dsp_init_debugfs(struct cs_dsp *dsp, struct dentry *debugfs_root) in cs_dsp_init_debugfs() argument
499 root = debugfs_create_dir(dsp->name, debugfs_root); in cs_dsp_init_debugfs()
501 debugfs_create_bool("booted", 0444, root, &dsp->booted); in cs_dsp_init_debugfs()
502 debugfs_create_bool("running", 0444, root, &dsp->running); in cs_dsp_init_debugfs()
503 debugfs_create_x32("fw_id", 0444, root, &dsp->fw_id); in cs_dsp_init_debugfs()
504 debugfs_create_x32("fw_version", 0444, root, &dsp->fw_id_version); in cs_dsp_init_debugfs()
507 debugfs_create_file(cs_dsp_debugfs_fops[i].name, 0444, root, in cs_dsp_init_debugfs()
508 dsp, &cs_dsp_debugfs_fops[i].fops); in cs_dsp_init_debugfs()
510 debugfs_create_file("controls", 0444, root, dsp, in cs_dsp_init_debugfs()
513 dsp->debugfs_root = root; in cs_dsp_init_debugfs()
518 * cs_dsp_cleanup_debugfs() - Removes DSP representation from debugfs
519 * @dsp: pointer to DSP structure
521 void cs_dsp_cleanup_debugfs(struct cs_dsp *dsp) in cs_dsp_cleanup_debugfs() argument
523 cs_dsp_debugfs_clear(dsp); in cs_dsp_cleanup_debugfs()
524 debugfs_remove_recursive(dsp->debugfs_root); in cs_dsp_cleanup_debugfs()
525 dsp->debugfs_root = ERR_PTR(-ENODEV); in cs_dsp_cleanup_debugfs()
529 void cs_dsp_init_debugfs(struct cs_dsp *dsp, struct dentry *debugfs_root) in cs_dsp_init_debugfs() argument
534 void cs_dsp_cleanup_debugfs(struct cs_dsp *dsp) in cs_dsp_cleanup_debugfs() argument
539 static inline void cs_dsp_debugfs_save_wmfwname(struct cs_dsp *dsp, in cs_dsp_debugfs_save_wmfwname() argument
544 static inline void cs_dsp_debugfs_save_binname(struct cs_dsp *dsp, in cs_dsp_debugfs_save_binname() argument
549 static inline void cs_dsp_debugfs_clear(struct cs_dsp *dsp) in cs_dsp_debugfs_clear() argument
554 static const struct cs_dsp_region *cs_dsp_find_region(struct cs_dsp *dsp, in cs_dsp_find_region() argument
559 for (i = 0; i < dsp->num_mems; i++) in cs_dsp_find_region()
560 if (dsp->mem[i].type == type) in cs_dsp_find_region()
561 return &dsp->mem[i]; in cs_dsp_find_region()
569 switch (mem->type) { in cs_dsp_region_to_reg()
571 return mem->base + (offset * 3); in cs_dsp_region_to_reg()
576 return mem->base + (offset * 2); in cs_dsp_region_to_reg()
586 switch (mem->type) { in cs_dsp_halo_region_to_reg()
589 return mem->base + (offset * 4); in cs_dsp_halo_region_to_reg()
592 return (mem->base + (offset * 3)) & ~0x3; in cs_dsp_halo_region_to_reg()
594 return mem->base + (offset * 5); in cs_dsp_halo_region_to_reg()
601 static void cs_dsp_read_fw_status(struct cs_dsp *dsp, in cs_dsp_read_fw_status() argument
608 ret = regmap_read(dsp->regmap, dsp->base + offs[i], &offs[i]); in cs_dsp_read_fw_status()
610 cs_dsp_err(dsp, "Failed to read SCRATCH%u: %d\n", i, ret); in cs_dsp_read_fw_status()
616 static void cs_dsp_adsp2_show_fw_status(struct cs_dsp *dsp) in cs_dsp_adsp2_show_fw_status() argument
622 cs_dsp_read_fw_status(dsp, ARRAY_SIZE(offs), offs); in cs_dsp_adsp2_show_fw_status()
624 cs_dsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n", in cs_dsp_adsp2_show_fw_status()
628 static void cs_dsp_adsp2v2_show_fw_status(struct cs_dsp *dsp) in cs_dsp_adsp2v2_show_fw_status() argument
632 cs_dsp_read_fw_status(dsp, ARRAY_SIZE(offs), offs); in cs_dsp_adsp2v2_show_fw_status()
634 cs_dsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n", in cs_dsp_adsp2v2_show_fw_status()
639 static void cs_dsp_halo_show_fw_status(struct cs_dsp *dsp) in cs_dsp_halo_show_fw_status() argument
645 cs_dsp_read_fw_status(dsp, ARRAY_SIZE(offs), offs); in cs_dsp_halo_show_fw_status()
647 cs_dsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n", in cs_dsp_halo_show_fw_status()
654 const struct cs_dsp_alg_region *alg_region = &ctl->alg_region; in cs_dsp_coeff_base_reg()
655 struct cs_dsp *dsp = ctl->dsp; in cs_dsp_coeff_base_reg() local
658 mem = cs_dsp_find_region(dsp, alg_region->type); in cs_dsp_coeff_base_reg()
660 cs_dsp_err(dsp, "No base for region %x\n", in cs_dsp_coeff_base_reg()
661 alg_region->type); in cs_dsp_coeff_base_reg()
662 return -EINVAL; in cs_dsp_coeff_base_reg()
665 *reg = dsp->ops->region_to_reg(mem, ctl->alg_region.base + ctl->offset + off); in cs_dsp_coeff_base_reg()
671 * cs_dsp_coeff_write_acked_control() - Sends event_id to the acked control
684 struct cs_dsp *dsp = ctl->dsp; in cs_dsp_coeff_write_acked_control() local
689 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_coeff_write_acked_control()
691 if (!dsp->running) in cs_dsp_coeff_write_acked_control()
692 return -EPERM; in cs_dsp_coeff_write_acked_control()
698 cs_dsp_dbg(dsp, "Sending 0x%x to acked control alg 0x%x %s:0x%x\n", in cs_dsp_coeff_write_acked_control()
699 event_id, ctl->alg_region.alg, in cs_dsp_coeff_write_acked_control()
700 cs_dsp_mem_region_name(ctl->alg_region.type), ctl->offset); in cs_dsp_coeff_write_acked_control()
702 ret = regmap_raw_write(dsp->regmap, reg, &val, sizeof(val)); in cs_dsp_coeff_write_acked_control()
704 cs_dsp_err(dsp, "Failed to write %x: %d\n", reg, ret); in cs_dsp_coeff_write_acked_control()
716 case 0 ... CS_DSP_ACKED_CTL_N_QUICKPOLLS - 1: in cs_dsp_coeff_write_acked_control()
726 ret = regmap_raw_read(dsp->regmap, reg, &val, sizeof(val)); in cs_dsp_coeff_write_acked_control()
728 cs_dsp_err(dsp, "Failed to read %x: %d\n", reg, ret); in cs_dsp_coeff_write_acked_control()
733 cs_dsp_dbg(dsp, "Acked control ACKED at poll %u\n", i); in cs_dsp_coeff_write_acked_control()
738 cs_dsp_warn(dsp, "Acked control @0x%x alg:0x%x %s:0x%x timed out\n", in cs_dsp_coeff_write_acked_control()
739 reg, ctl->alg_region.alg, in cs_dsp_coeff_write_acked_control()
740 cs_dsp_mem_region_name(ctl->alg_region.type), in cs_dsp_coeff_write_acked_control()
741 ctl->offset); in cs_dsp_coeff_write_acked_control()
743 return -ETIMEDOUT; in cs_dsp_coeff_write_acked_control()
750 struct cs_dsp *dsp = ctl->dsp; in cs_dsp_coeff_write_ctrl_raw() local
761 return -ENOMEM; in cs_dsp_coeff_write_ctrl_raw()
763 ret = regmap_raw_write(dsp->regmap, reg, scratch, in cs_dsp_coeff_write_ctrl_raw()
766 cs_dsp_err(dsp, "Failed to write %zu bytes to %x: %d\n", in cs_dsp_coeff_write_ctrl_raw()
771 cs_dsp_dbg(dsp, "Wrote %zu bytes to %x\n", len, reg); in cs_dsp_coeff_write_ctrl_raw()
779 * cs_dsp_coeff_write_ctrl() - Writes the given buffer to the given coefficient control
795 return -ENOENT; in cs_dsp_coeff_write_ctrl()
797 lockdep_assert_held(&ctl->dsp->pwr_lock); in cs_dsp_coeff_write_ctrl()
799 if (ctl->flags && !(ctl->flags & WMFW_CTL_FLAG_WRITEABLE)) in cs_dsp_coeff_write_ctrl()
800 return -EPERM; in cs_dsp_coeff_write_ctrl()
802 if (len + off * sizeof(u32) > ctl->len) in cs_dsp_coeff_write_ctrl()
803 return -EINVAL; in cs_dsp_coeff_write_ctrl()
805 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) { in cs_dsp_coeff_write_ctrl()
806 ret = -EPERM; in cs_dsp_coeff_write_ctrl()
807 } else if (buf != ctl->cache) { in cs_dsp_coeff_write_ctrl()
808 if (memcmp(ctl->cache + off * sizeof(u32), buf, len)) in cs_dsp_coeff_write_ctrl()
809 memcpy(ctl->cache + off * sizeof(u32), buf, len); in cs_dsp_coeff_write_ctrl()
814 ctl->set = 1; in cs_dsp_coeff_write_ctrl()
815 if (ctl->enabled && ctl->dsp->running) in cs_dsp_coeff_write_ctrl()
828 struct cs_dsp *dsp = ctl->dsp; in cs_dsp_coeff_read_ctrl_raw() local
839 return -ENOMEM; in cs_dsp_coeff_read_ctrl_raw()
841 ret = regmap_raw_read(dsp->regmap, reg, scratch, len); in cs_dsp_coeff_read_ctrl_raw()
843 cs_dsp_err(dsp, "Failed to read %zu bytes from %x: %d\n", in cs_dsp_coeff_read_ctrl_raw()
848 cs_dsp_dbg(dsp, "Read %zu bytes from %x\n", len, reg); in cs_dsp_coeff_read_ctrl_raw()
857 * cs_dsp_coeff_read_ctrl() - Reads the given coefficient control into the given buffer
873 return -ENOENT; in cs_dsp_coeff_read_ctrl()
875 lockdep_assert_held(&ctl->dsp->pwr_lock); in cs_dsp_coeff_read_ctrl()
877 if (len + off * sizeof(u32) > ctl->len) in cs_dsp_coeff_read_ctrl()
878 return -EINVAL; in cs_dsp_coeff_read_ctrl()
880 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) { in cs_dsp_coeff_read_ctrl()
881 if (ctl->enabled && ctl->dsp->running) in cs_dsp_coeff_read_ctrl()
884 return -EPERM; in cs_dsp_coeff_read_ctrl()
886 if (!ctl->flags && ctl->enabled && ctl->dsp->running) in cs_dsp_coeff_read_ctrl()
887 ret = cs_dsp_coeff_read_ctrl_raw(ctl, 0, ctl->cache, ctl->len); in cs_dsp_coeff_read_ctrl()
889 if (buf != ctl->cache) in cs_dsp_coeff_read_ctrl()
890 memcpy(buf, ctl->cache + off * sizeof(u32), len); in cs_dsp_coeff_read_ctrl()
897 static int cs_dsp_coeff_init_control_caches(struct cs_dsp *dsp) in cs_dsp_coeff_init_control_caches() argument
902 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_coeff_init_control_caches()
903 if (!ctl->enabled || ctl->set) in cs_dsp_coeff_init_control_caches()
905 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) in cs_dsp_coeff_init_control_caches()
909 * For readable controls populate the cache from the DSP memory. in cs_dsp_coeff_init_control_caches()
910 * For non-readable controls the cache was zero-filled when in cs_dsp_coeff_init_control_caches()
913 if (!ctl->flags || (ctl->flags & WMFW_CTL_FLAG_READABLE)) { in cs_dsp_coeff_init_control_caches()
914 ret = cs_dsp_coeff_read_ctrl_raw(ctl, 0, ctl->cache, ctl->len); in cs_dsp_coeff_init_control_caches()
923 static int cs_dsp_coeff_sync_controls(struct cs_dsp *dsp) in cs_dsp_coeff_sync_controls() argument
928 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_coeff_sync_controls()
929 if (!ctl->enabled) in cs_dsp_coeff_sync_controls()
931 if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) { in cs_dsp_coeff_sync_controls()
932 ret = cs_dsp_coeff_write_ctrl_raw(ctl, 0, ctl->cache, in cs_dsp_coeff_sync_controls()
933 ctl->len); in cs_dsp_coeff_sync_controls()
942 static void cs_dsp_signal_event_controls(struct cs_dsp *dsp, in cs_dsp_signal_event_controls() argument
948 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_signal_event_controls()
949 if (ctl->type != WMFW_CTL_TYPE_HOSTEVENT) in cs_dsp_signal_event_controls()
952 if (!ctl->enabled) in cs_dsp_signal_event_controls()
957 cs_dsp_warn(dsp, in cs_dsp_signal_event_controls()
959 event, ctl->alg_region.alg, ret); in cs_dsp_signal_event_controls()
965 kfree(ctl->cache); in cs_dsp_free_ctl_blk()
966 kfree(ctl->subname); in cs_dsp_free_ctl_blk()
970 static int cs_dsp_create_control(struct cs_dsp *dsp, in cs_dsp_create_control() argument
979 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_create_control()
980 if (ctl->fw_name == dsp->fw_name && in cs_dsp_create_control()
981 ctl->alg_region.alg == alg_region->alg && in cs_dsp_create_control()
982 ctl->alg_region.type == alg_region->type) { in cs_dsp_create_control()
983 if ((!subname && !ctl->subname) || in cs_dsp_create_control()
984 (subname && (ctl->subname_len == subname_len) && in cs_dsp_create_control()
985 !strncmp(ctl->subname, subname, ctl->subname_len))) { in cs_dsp_create_control()
986 if (!ctl->enabled) in cs_dsp_create_control()
987 ctl->enabled = 1; in cs_dsp_create_control()
995 return -ENOMEM; in cs_dsp_create_control()
997 ctl->fw_name = dsp->fw_name; in cs_dsp_create_control()
998 ctl->alg_region = *alg_region; in cs_dsp_create_control()
999 if (subname && dsp->fw_ver >= 2) { in cs_dsp_create_control()
1000 ctl->subname_len = subname_len; in cs_dsp_create_control()
1001 ctl->subname = kasprintf(GFP_KERNEL, "%.*s", subname_len, subname); in cs_dsp_create_control()
1002 if (!ctl->subname) { in cs_dsp_create_control()
1003 ret = -ENOMEM; in cs_dsp_create_control()
1007 ctl->enabled = 1; in cs_dsp_create_control()
1008 ctl->set = 0; in cs_dsp_create_control()
1009 ctl->dsp = dsp; in cs_dsp_create_control()
1011 ctl->flags = flags; in cs_dsp_create_control()
1012 ctl->type = type; in cs_dsp_create_control()
1013 ctl->offset = offset; in cs_dsp_create_control()
1014 ctl->len = len; in cs_dsp_create_control()
1015 ctl->cache = kzalloc(ctl->len, GFP_KERNEL); in cs_dsp_create_control()
1016 if (!ctl->cache) { in cs_dsp_create_control()
1017 ret = -ENOMEM; in cs_dsp_create_control()
1021 list_add(&ctl->list, &dsp->ctl_list); in cs_dsp_create_control()
1023 if (dsp->client_ops->control_add) { in cs_dsp_create_control()
1024 ret = dsp->client_ops->control_add(ctl); in cs_dsp_create_control()
1032 list_del(&ctl->list); in cs_dsp_create_control()
1033 kfree(ctl->cache); in cs_dsp_create_control()
1035 kfree(ctl->subname); in cs_dsp_create_control()
1044 const u8 *name; member
1052 const u8 *name; member
1115 static int cs_dsp_coeff_parse_alg(struct cs_dsp *dsp, in cs_dsp_coeff_parse_alg() argument
1120 unsigned int data_len = le32_to_cpu(region->len); in cs_dsp_coeff_parse_alg()
1124 raw = (const struct wmfw_adsp_alg_data *)region->data; in cs_dsp_coeff_parse_alg()
1126 switch (dsp->fw_ver) { in cs_dsp_coeff_parse_alg()
1130 return -EOVERFLOW; in cs_dsp_coeff_parse_alg()
1132 blk->id = le32_to_cpu(raw->id); in cs_dsp_coeff_parse_alg()
1133 blk->name = raw->name; in cs_dsp_coeff_parse_alg()
1134 blk->name_len = strnlen(raw->name, ARRAY_SIZE(raw->name)); in cs_dsp_coeff_parse_alg()
1135 blk->ncoeff = le32_to_cpu(raw->ncoeff); in cs_dsp_coeff_parse_alg()
1140 if (sizeof(raw->id) > data_len) in cs_dsp_coeff_parse_alg()
1141 return -EOVERFLOW; in cs_dsp_coeff_parse_alg()
1143 tmp = region->data; in cs_dsp_coeff_parse_alg()
1144 blk->id = cs_dsp_coeff_parse_int(sizeof(raw->id), &tmp); in cs_dsp_coeff_parse_alg()
1145 pos = tmp - region->data; in cs_dsp_coeff_parse_alg()
1147 tmp = ®ion->data[pos]; in cs_dsp_coeff_parse_alg()
1148 blk->name_len = cs_dsp_coeff_parse_string(sizeof(u8), &tmp, data_len - pos, in cs_dsp_coeff_parse_alg()
1149 &blk->name); in cs_dsp_coeff_parse_alg()
1151 return -EOVERFLOW; in cs_dsp_coeff_parse_alg()
1153 pos = tmp - region->data; in cs_dsp_coeff_parse_alg()
1154 cs_dsp_coeff_parse_string(sizeof(u16), &tmp, data_len - pos, NULL); in cs_dsp_coeff_parse_alg()
1156 return -EOVERFLOW; in cs_dsp_coeff_parse_alg()
1158 pos = tmp - region->data; in cs_dsp_coeff_parse_alg()
1159 if (sizeof(raw->ncoeff) > (data_len - pos)) in cs_dsp_coeff_parse_alg()
1160 return -EOVERFLOW; in cs_dsp_coeff_parse_alg()
1162 blk->ncoeff = cs_dsp_coeff_parse_int(sizeof(raw->ncoeff), &tmp); in cs_dsp_coeff_parse_alg()
1163 pos += sizeof(raw->ncoeff); in cs_dsp_coeff_parse_alg()
1167 if ((int)blk->ncoeff < 0) in cs_dsp_coeff_parse_alg()
1168 return -EOVERFLOW; in cs_dsp_coeff_parse_alg()
1170 cs_dsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id); in cs_dsp_coeff_parse_alg()
1171 cs_dsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name); in cs_dsp_coeff_parse_alg()
1172 cs_dsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff); in cs_dsp_coeff_parse_alg()
1177 static int cs_dsp_coeff_parse_coeff(struct cs_dsp *dsp, in cs_dsp_coeff_parse_coeff() argument
1183 unsigned int data_len = le32_to_cpu(region->len); in cs_dsp_coeff_parse_coeff()
1187 raw = (const struct wmfw_adsp_coeff_data *)®ion->data[pos]; in cs_dsp_coeff_parse_coeff()
1188 if (sizeof(raw->hdr) > (data_len - pos)) in cs_dsp_coeff_parse_coeff()
1189 return -EOVERFLOW; in cs_dsp_coeff_parse_coeff()
1191 blk_len = le32_to_cpu(raw->hdr.size); in cs_dsp_coeff_parse_coeff()
1193 return -EOVERFLOW; in cs_dsp_coeff_parse_coeff()
1195 if (blk_len > (data_len - pos - sizeof(raw->hdr))) in cs_dsp_coeff_parse_coeff()
1196 return -EOVERFLOW; in cs_dsp_coeff_parse_coeff()
1198 blk_end_pos = pos + sizeof(raw->hdr) + blk_len; in cs_dsp_coeff_parse_coeff()
1200 blk->offset = le16_to_cpu(raw->hdr.offset); in cs_dsp_coeff_parse_coeff()
1201 blk->mem_type = le16_to_cpu(raw->hdr.type); in cs_dsp_coeff_parse_coeff()
1203 switch (dsp->fw_ver) { in cs_dsp_coeff_parse_coeff()
1206 if (sizeof(*raw) > (data_len - pos)) in cs_dsp_coeff_parse_coeff()
1207 return -EOVERFLOW; in cs_dsp_coeff_parse_coeff()
1209 blk->name = raw->name; in cs_dsp_coeff_parse_coeff()
1210 blk->name_len = strnlen(raw->name, ARRAY_SIZE(raw->name)); in cs_dsp_coeff_parse_coeff()
1211 blk->ctl_type = le16_to_cpu(raw->ctl_type); in cs_dsp_coeff_parse_coeff()
1212 blk->flags = le16_to_cpu(raw->flags); in cs_dsp_coeff_parse_coeff()
1213 blk->len = le32_to_cpu(raw->len); in cs_dsp_coeff_parse_coeff()
1216 pos += sizeof(raw->hdr); in cs_dsp_coeff_parse_coeff()
1217 tmp = ®ion->data[pos]; in cs_dsp_coeff_parse_coeff()
1218 blk->name_len = cs_dsp_coeff_parse_string(sizeof(u8), &tmp, data_len - pos, in cs_dsp_coeff_parse_coeff()
1219 &blk->name); in cs_dsp_coeff_parse_coeff()
1221 return -EOVERFLOW; in cs_dsp_coeff_parse_coeff()
1223 pos = tmp - region->data; in cs_dsp_coeff_parse_coeff()
1224 cs_dsp_coeff_parse_string(sizeof(u8), &tmp, data_len - pos, NULL); in cs_dsp_coeff_parse_coeff()
1226 return -EOVERFLOW; in cs_dsp_coeff_parse_coeff()
1228 pos = tmp - region->data; in cs_dsp_coeff_parse_coeff()
1229 cs_dsp_coeff_parse_string(sizeof(u16), &tmp, data_len - pos, NULL); in cs_dsp_coeff_parse_coeff()
1231 return -EOVERFLOW; in cs_dsp_coeff_parse_coeff()
1233 pos = tmp - region->data; in cs_dsp_coeff_parse_coeff()
1234 if (sizeof(raw->ctl_type) + sizeof(raw->flags) + sizeof(raw->len) > in cs_dsp_coeff_parse_coeff()
1235 (data_len - pos)) in cs_dsp_coeff_parse_coeff()
1236 return -EOVERFLOW; in cs_dsp_coeff_parse_coeff()
1238 blk->ctl_type = cs_dsp_coeff_parse_int(sizeof(raw->ctl_type), &tmp); in cs_dsp_coeff_parse_coeff()
1239 pos += sizeof(raw->ctl_type); in cs_dsp_coeff_parse_coeff()
1240 blk->flags = cs_dsp_coeff_parse_int(sizeof(raw->flags), &tmp); in cs_dsp_coeff_parse_coeff()
1241 pos += sizeof(raw->flags); in cs_dsp_coeff_parse_coeff()
1242 blk->len = cs_dsp_coeff_parse_int(sizeof(raw->len), &tmp); in cs_dsp_coeff_parse_coeff()
1246 cs_dsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type); in cs_dsp_coeff_parse_coeff()
1247 cs_dsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset); in cs_dsp_coeff_parse_coeff()
1248 cs_dsp_dbg(dsp, "\tCoefficient name: %.*s\n", blk->name_len, blk->name); in cs_dsp_coeff_parse_coeff()
1249 cs_dsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags); in cs_dsp_coeff_parse_coeff()
1250 cs_dsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type); in cs_dsp_coeff_parse_coeff()
1251 cs_dsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len); in cs_dsp_coeff_parse_coeff()
1256 static int cs_dsp_check_coeff_flags(struct cs_dsp *dsp, in cs_dsp_check_coeff_flags() argument
1261 if ((coeff_blk->flags & f_illegal) || in cs_dsp_check_coeff_flags()
1262 ((coeff_blk->flags & f_required) != f_required)) { in cs_dsp_check_coeff_flags()
1263 cs_dsp_err(dsp, "Illegal flags 0x%x for control type 0x%x\n", in cs_dsp_check_coeff_flags()
1264 coeff_blk->flags, coeff_blk->ctl_type); in cs_dsp_check_coeff_flags()
1265 return -EINVAL; in cs_dsp_check_coeff_flags()
1271 static int cs_dsp_parse_coeff(struct cs_dsp *dsp, in cs_dsp_parse_coeff() argument
1279 pos = cs_dsp_coeff_parse_alg(dsp, region, &alg_blk); in cs_dsp_parse_coeff()
1284 pos = cs_dsp_coeff_parse_coeff(dsp, region, pos, &coeff_blk); in cs_dsp_parse_coeff()
1295 ret = cs_dsp_check_coeff_flags(dsp, &coeff_blk, in cs_dsp_parse_coeff()
1301 return -EINVAL; in cs_dsp_parse_coeff()
1305 ret = cs_dsp_check_coeff_flags(dsp, &coeff_blk, in cs_dsp_parse_coeff()
1312 return -EINVAL; in cs_dsp_parse_coeff()
1315 ret = cs_dsp_check_coeff_flags(dsp, &coeff_blk, in cs_dsp_parse_coeff()
1321 return -EINVAL; in cs_dsp_parse_coeff()
1324 cs_dsp_err(dsp, "Unknown control type: %d\n", in cs_dsp_parse_coeff()
1326 return -EINVAL; in cs_dsp_parse_coeff()
1332 ret = cs_dsp_create_control(dsp, &alg_region, in cs_dsp_parse_coeff()
1335 coeff_blk.name, in cs_dsp_parse_coeff()
1340 cs_dsp_err(dsp, "Failed to create control: %.*s, %d\n", in cs_dsp_parse_coeff()
1341 coeff_blk.name_len, coeff_blk.name, ret); in cs_dsp_parse_coeff()
1347 static unsigned int cs_dsp_adsp1_parse_sizes(struct cs_dsp *dsp, in cs_dsp_adsp1_parse_sizes() argument
1354 adsp1_sizes = (void *)&firmware->data[pos]; in cs_dsp_adsp1_parse_sizes()
1355 if (sizeof(*adsp1_sizes) > firmware->size - pos) { in cs_dsp_adsp1_parse_sizes()
1356 cs_dsp_err(dsp, "%s: file truncated\n", file); in cs_dsp_adsp1_parse_sizes()
1360 cs_dsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n", file, in cs_dsp_adsp1_parse_sizes()
1361 le32_to_cpu(adsp1_sizes->dm), le32_to_cpu(adsp1_sizes->pm), in cs_dsp_adsp1_parse_sizes()
1362 le32_to_cpu(adsp1_sizes->zm)); in cs_dsp_adsp1_parse_sizes()
1367 static unsigned int cs_dsp_adsp2_parse_sizes(struct cs_dsp *dsp, in cs_dsp_adsp2_parse_sizes() argument
1374 adsp2_sizes = (void *)&firmware->data[pos]; in cs_dsp_adsp2_parse_sizes()
1375 if (sizeof(*adsp2_sizes) > firmware->size - pos) { in cs_dsp_adsp2_parse_sizes()
1376 cs_dsp_err(dsp, "%s: file truncated\n", file); in cs_dsp_adsp2_parse_sizes()
1380 cs_dsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n", file, in cs_dsp_adsp2_parse_sizes()
1381 le32_to_cpu(adsp2_sizes->xm), le32_to_cpu(adsp2_sizes->ym), in cs_dsp_adsp2_parse_sizes()
1382 le32_to_cpu(adsp2_sizes->pm), le32_to_cpu(adsp2_sizes->zm)); in cs_dsp_adsp2_parse_sizes()
1387 static bool cs_dsp_validate_version(struct cs_dsp *dsp, unsigned int version) in cs_dsp_validate_version() argument
1391 cs_dsp_warn(dsp, "Deprecated file format %d\n", version); in cs_dsp_validate_version()
1401 static bool cs_dsp_halo_validate_version(struct cs_dsp *dsp, unsigned int version) in cs_dsp_halo_validate_version() argument
1411 static int cs_dsp_load(struct cs_dsp *dsp, const struct firmware *firmware, in cs_dsp_load() argument
1415 struct regmap *regmap = dsp->regmap; in cs_dsp_load()
1431 ret = -EINVAL; in cs_dsp_load()
1433 if (sizeof(*header) >= firmware->size) { in cs_dsp_load()
1434 ret = -EOVERFLOW; in cs_dsp_load()
1438 header = (void *)&firmware->data[0]; in cs_dsp_load()
1440 if (memcmp(&header->magic[0], "WMFW", 4) != 0) { in cs_dsp_load()
1441 cs_dsp_err(dsp, "%s: invalid magic\n", file); in cs_dsp_load()
1445 if (!dsp->ops->validate_version(dsp, header->ver)) { in cs_dsp_load()
1446 cs_dsp_err(dsp, "%s: unknown file format %d\n", in cs_dsp_load()
1447 file, header->ver); in cs_dsp_load()
1451 cs_dsp_info(dsp, "Firmware version: %d\n", header->ver); in cs_dsp_load()
1452 dsp->fw_ver = header->ver; in cs_dsp_load()
1454 if (header->core != dsp->type) { in cs_dsp_load()
1455 cs_dsp_err(dsp, "%s: invalid core %d != %d\n", in cs_dsp_load()
1456 file, header->core, dsp->type); in cs_dsp_load()
1461 pos = dsp->ops->parse_sizes(dsp, file, pos, firmware); in cs_dsp_load()
1462 if ((pos == 0) || (sizeof(*footer) > firmware->size - pos)) { in cs_dsp_load()
1463 ret = -EOVERFLOW; in cs_dsp_load()
1467 footer = (void *)&firmware->data[pos]; in cs_dsp_load()
1470 if (le32_to_cpu(header->len) != pos) { in cs_dsp_load()
1471 ret = -EOVERFLOW; in cs_dsp_load()
1475 cs_dsp_dbg(dsp, "%s: timestamp %llu\n", file, in cs_dsp_load()
1476 le64_to_cpu(footer->timestamp)); in cs_dsp_load()
1478 while (pos < firmware->size) { in cs_dsp_load()
1480 if (sizeof(*region) > firmware->size - pos) { in cs_dsp_load()
1481 ret = -EOVERFLOW; in cs_dsp_load()
1485 region = (void *)&(firmware->data[pos]); in cs_dsp_load()
1487 if (le32_to_cpu(region->len) > firmware->size - pos - sizeof(*region)) { in cs_dsp_load()
1488 ret = -EOVERFLOW; in cs_dsp_load()
1495 offset = le32_to_cpu(region->offset) & 0xffffff; in cs_dsp_load()
1496 type = be32_to_cpu(region->type) & 0xff; in cs_dsp_load()
1500 region_name = "Firmware name"; in cs_dsp_load()
1501 text = kzalloc(le32_to_cpu(region->len) + 1, in cs_dsp_load()
1506 ret = cs_dsp_parse_coeff(dsp, region); in cs_dsp_load()
1512 text = kzalloc(le32_to_cpu(region->len) + 1, in cs_dsp_load()
1527 mem = cs_dsp_find_region(dsp, type); in cs_dsp_load()
1529 cs_dsp_err(dsp, "No region of type: %x\n", type); in cs_dsp_load()
1530 ret = -EINVAL; in cs_dsp_load()
1535 reg = dsp->ops->region_to_reg(mem, offset); in cs_dsp_load()
1538 cs_dsp_warn(dsp, in cs_dsp_load()
1544 cs_dsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file, in cs_dsp_load()
1545 regions, le32_to_cpu(region->len), offset, in cs_dsp_load()
1549 memcpy(text, region->data, le32_to_cpu(region->len)); in cs_dsp_load()
1550 cs_dsp_info(dsp, "%s: %s\n", file, text); in cs_dsp_load()
1556 buf = cs_dsp_buf_alloc(region->data, in cs_dsp_load()
1557 le32_to_cpu(region->len), in cs_dsp_load()
1560 cs_dsp_err(dsp, "Out of memory\n"); in cs_dsp_load()
1561 ret = -ENOMEM; in cs_dsp_load()
1565 ret = regmap_raw_write_async(regmap, reg, buf->buf, in cs_dsp_load()
1566 le32_to_cpu(region->len)); in cs_dsp_load()
1568 cs_dsp_err(dsp, in cs_dsp_load()
1571 le32_to_cpu(region->len), offset, in cs_dsp_load()
1577 pos += le32_to_cpu(region->len) + sizeof(*region); in cs_dsp_load()
1583 cs_dsp_err(dsp, "Failed to complete async write: %d\n", ret); in cs_dsp_load()
1587 if (pos > firmware->size) in cs_dsp_load()
1588 cs_dsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", in cs_dsp_load()
1589 file, regions, pos - firmware->size); in cs_dsp_load()
1591 cs_dsp_debugfs_save_wmfwname(dsp, file); in cs_dsp_load()
1598 if (ret == -EOVERFLOW) in cs_dsp_load()
1599 cs_dsp_err(dsp, "%s: file content overflows file data\n", file); in cs_dsp_load()
1605 * cs_dsp_get_ctl() - Finds a matching coefficient control
1606 * @dsp: pointer to DSP structure
1607 * @name: pointer to string to match with a control's subname
1611 * Find cs_dsp_coeff_ctl with input name as its subname
1615 struct cs_dsp_coeff_ctl *cs_dsp_get_ctl(struct cs_dsp *dsp, const char *name, int type, in cs_dsp_get_ctl() argument
1620 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_get_ctl()
1622 list_for_each_entry(pos, &dsp->ctl_list, list) { in cs_dsp_get_ctl()
1623 if (!pos->subname) in cs_dsp_get_ctl()
1625 if (strncmp(pos->subname, name, pos->subname_len) == 0 && in cs_dsp_get_ctl()
1626 pos->fw_name == dsp->fw_name && in cs_dsp_get_ctl()
1627 pos->alg_region.alg == alg && in cs_dsp_get_ctl()
1628 pos->alg_region.type == type) { in cs_dsp_get_ctl()
1638 static void cs_dsp_ctl_fixup_base(struct cs_dsp *dsp, in cs_dsp_ctl_fixup_base() argument
1643 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_ctl_fixup_base()
1644 if (ctl->fw_name == dsp->fw_name && in cs_dsp_ctl_fixup_base()
1645 alg_region->alg == ctl->alg_region.alg && in cs_dsp_ctl_fixup_base()
1646 alg_region->type == ctl->alg_region.type) { in cs_dsp_ctl_fixup_base()
1647 ctl->alg_region.base = alg_region->base; in cs_dsp_ctl_fixup_base()
1652 static void *cs_dsp_read_algs(struct cs_dsp *dsp, size_t n_algs, in cs_dsp_read_algs() argument
1662 cs_dsp_err(dsp, "No algorithms\n"); in cs_dsp_read_algs()
1663 return ERR_PTR(-EINVAL); in cs_dsp_read_algs()
1667 cs_dsp_err(dsp, "Algorithm count %zx excessive\n", n_algs); in cs_dsp_read_algs()
1668 return ERR_PTR(-EINVAL); in cs_dsp_read_algs()
1672 reg = dsp->ops->region_to_reg(mem, pos + len); in cs_dsp_read_algs()
1674 ret = regmap_raw_read(dsp->regmap, reg, &val, sizeof(val)); in cs_dsp_read_algs()
1676 cs_dsp_err(dsp, "Failed to read algorithm list end: %d\n", in cs_dsp_read_algs()
1682 cs_dsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbedead\n", in cs_dsp_read_algs()
1685 /* Convert length from DSP words to bytes */ in cs_dsp_read_algs()
1690 return ERR_PTR(-ENOMEM); in cs_dsp_read_algs()
1692 reg = dsp->ops->region_to_reg(mem, pos); in cs_dsp_read_algs()
1694 ret = regmap_raw_read(dsp->regmap, reg, alg, len); in cs_dsp_read_algs()
1696 cs_dsp_err(dsp, "Failed to read algorithm list: %d\n", ret); in cs_dsp_read_algs()
1705 * cs_dsp_find_alg_region() - Finds a matching algorithm region
1706 * @dsp: pointer to DSP structure
1712 struct cs_dsp_alg_region *cs_dsp_find_alg_region(struct cs_dsp *dsp, in cs_dsp_find_alg_region() argument
1717 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_find_alg_region()
1719 list_for_each_entry(alg_region, &dsp->alg_regions, list) { in cs_dsp_find_alg_region()
1720 if (id == alg_region->alg && type == alg_region->type) in cs_dsp_find_alg_region()
1728 static struct cs_dsp_alg_region *cs_dsp_create_region(struct cs_dsp *dsp, in cs_dsp_create_region() argument
1736 return ERR_PTR(-ENOMEM); in cs_dsp_create_region()
1738 alg_region->type = type; in cs_dsp_create_region()
1739 alg_region->alg = be32_to_cpu(id); in cs_dsp_create_region()
1740 alg_region->ver = be32_to_cpu(ver); in cs_dsp_create_region()
1741 alg_region->base = be32_to_cpu(base); in cs_dsp_create_region()
1743 list_add_tail(&alg_region->list, &dsp->alg_regions); in cs_dsp_create_region()
1745 if (dsp->fw_ver > 0) in cs_dsp_create_region()
1746 cs_dsp_ctl_fixup_base(dsp, alg_region); in cs_dsp_create_region()
1751 static void cs_dsp_free_alg_regions(struct cs_dsp *dsp) in cs_dsp_free_alg_regions() argument
1755 while (!list_empty(&dsp->alg_regions)) { in cs_dsp_free_alg_regions()
1756 alg_region = list_first_entry(&dsp->alg_regions, in cs_dsp_free_alg_regions()
1759 list_del(&alg_region->list); in cs_dsp_free_alg_regions()
1764 static void cs_dsp_parse_wmfw_id_header(struct cs_dsp *dsp, in cs_dsp_parse_wmfw_id_header() argument
1767 dsp->fw_id = be32_to_cpu(fw->id); in cs_dsp_parse_wmfw_id_header()
1768 dsp->fw_id_version = be32_to_cpu(fw->ver); in cs_dsp_parse_wmfw_id_header()
1770 cs_dsp_info(dsp, "Firmware: %x v%d.%d.%d, %d algorithms\n", in cs_dsp_parse_wmfw_id_header()
1771 dsp->fw_id, (dsp->fw_id_version & 0xff0000) >> 16, in cs_dsp_parse_wmfw_id_header()
1772 (dsp->fw_id_version & 0xff00) >> 8, dsp->fw_id_version & 0xff, in cs_dsp_parse_wmfw_id_header()
1776 static void cs_dsp_parse_wmfw_v3_id_header(struct cs_dsp *dsp, in cs_dsp_parse_wmfw_v3_id_header() argument
1779 dsp->fw_id = be32_to_cpu(fw->id); in cs_dsp_parse_wmfw_v3_id_header()
1780 dsp->fw_id_version = be32_to_cpu(fw->ver); in cs_dsp_parse_wmfw_v3_id_header()
1781 dsp->fw_vendor_id = be32_to_cpu(fw->vendor_id); in cs_dsp_parse_wmfw_v3_id_header()
1783 cs_dsp_info(dsp, "Firmware: %x vendor: 0x%x v%d.%d.%d, %d algorithms\n", in cs_dsp_parse_wmfw_v3_id_header()
1784 dsp->fw_id, dsp->fw_vendor_id, in cs_dsp_parse_wmfw_v3_id_header()
1785 (dsp->fw_id_version & 0xff0000) >> 16, in cs_dsp_parse_wmfw_v3_id_header()
1786 (dsp->fw_id_version & 0xff00) >> 8, dsp->fw_id_version & 0xff, in cs_dsp_parse_wmfw_v3_id_header()
1790 static int cs_dsp_create_regions(struct cs_dsp *dsp, __be32 id, __be32 ver, in cs_dsp_create_regions() argument
1797 alg_region = cs_dsp_create_region(dsp, type[i], id, ver, base[i]); in cs_dsp_create_regions()
1805 static int cs_dsp_adsp1_setup_algs(struct cs_dsp *dsp) in cs_dsp_adsp1_setup_algs() argument
1815 mem = cs_dsp_find_region(dsp, WMFW_ADSP1_DM); in cs_dsp_adsp1_setup_algs()
1817 return -EINVAL; in cs_dsp_adsp1_setup_algs()
1819 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp1_id, in cs_dsp_adsp1_setup_algs()
1822 cs_dsp_err(dsp, "Failed to read algorithm info: %d\n", in cs_dsp_adsp1_setup_algs()
1829 cs_dsp_parse_wmfw_id_header(dsp, &adsp1_id.fw, n_algs); in cs_dsp_adsp1_setup_algs()
1831 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP1_ZM, in cs_dsp_adsp1_setup_algs()
1837 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP1_DM, in cs_dsp_adsp1_setup_algs()
1843 /* Calculate offset and length in DSP words */ in cs_dsp_adsp1_setup_algs()
1847 adsp1_alg = cs_dsp_read_algs(dsp, n_algs, mem, pos, len); in cs_dsp_adsp1_setup_algs()
1852 cs_dsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n", in cs_dsp_adsp1_setup_algs()
1860 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP1_DM, in cs_dsp_adsp1_setup_algs()
1868 if (dsp->fw_ver == 0) { in cs_dsp_adsp1_setup_algs()
1871 len -= be32_to_cpu(adsp1_alg[i].dm); in cs_dsp_adsp1_setup_algs()
1873 cs_dsp_create_control(dsp, alg_region, 0, in cs_dsp_adsp1_setup_algs()
1877 cs_dsp_warn(dsp, "Missing length info for region DM with ID %x\n", in cs_dsp_adsp1_setup_algs()
1882 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP1_ZM, in cs_dsp_adsp1_setup_algs()
1890 if (dsp->fw_ver == 0) { in cs_dsp_adsp1_setup_algs()
1893 len -= be32_to_cpu(adsp1_alg[i].zm); in cs_dsp_adsp1_setup_algs()
1895 cs_dsp_create_control(dsp, alg_region, 0, in cs_dsp_adsp1_setup_algs()
1899 cs_dsp_warn(dsp, "Missing length info for region ZM with ID %x\n", in cs_dsp_adsp1_setup_algs()
1910 static int cs_dsp_adsp2_setup_algs(struct cs_dsp *dsp) in cs_dsp_adsp2_setup_algs() argument
1920 mem = cs_dsp_find_region(dsp, WMFW_ADSP2_XM); in cs_dsp_adsp2_setup_algs()
1922 return -EINVAL; in cs_dsp_adsp2_setup_algs()
1924 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp2_id, in cs_dsp_adsp2_setup_algs()
1927 cs_dsp_err(dsp, "Failed to read algorithm info: %d\n", in cs_dsp_adsp2_setup_algs()
1934 cs_dsp_parse_wmfw_id_header(dsp, &adsp2_id.fw, n_algs); in cs_dsp_adsp2_setup_algs()
1936 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_XM, in cs_dsp_adsp2_setup_algs()
1942 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_YM, in cs_dsp_adsp2_setup_algs()
1948 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_ZM, in cs_dsp_adsp2_setup_algs()
1954 /* Calculate offset and length in DSP words */ in cs_dsp_adsp2_setup_algs()
1958 adsp2_alg = cs_dsp_read_algs(dsp, n_algs, mem, pos, len); in cs_dsp_adsp2_setup_algs()
1963 cs_dsp_dbg(dsp, in cs_dsp_adsp2_setup_algs()
1973 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_XM, in cs_dsp_adsp2_setup_algs()
1981 if (dsp->fw_ver == 0) { in cs_dsp_adsp2_setup_algs()
1984 len -= be32_to_cpu(adsp2_alg[i].xm); in cs_dsp_adsp2_setup_algs()
1986 cs_dsp_create_control(dsp, alg_region, 0, in cs_dsp_adsp2_setup_algs()
1990 cs_dsp_warn(dsp, "Missing length info for region XM with ID %x\n", in cs_dsp_adsp2_setup_algs()
1995 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_YM, in cs_dsp_adsp2_setup_algs()
2003 if (dsp->fw_ver == 0) { in cs_dsp_adsp2_setup_algs()
2006 len -= be32_to_cpu(adsp2_alg[i].ym); in cs_dsp_adsp2_setup_algs()
2008 cs_dsp_create_control(dsp, alg_region, 0, in cs_dsp_adsp2_setup_algs()
2012 cs_dsp_warn(dsp, "Missing length info for region YM with ID %x\n", in cs_dsp_adsp2_setup_algs()
2017 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_ZM, in cs_dsp_adsp2_setup_algs()
2025 if (dsp->fw_ver == 0) { in cs_dsp_adsp2_setup_algs()
2028 len -= be32_to_cpu(adsp2_alg[i].zm); in cs_dsp_adsp2_setup_algs()
2030 cs_dsp_create_control(dsp, alg_region, 0, in cs_dsp_adsp2_setup_algs()
2034 cs_dsp_warn(dsp, "Missing length info for region ZM with ID %x\n", in cs_dsp_adsp2_setup_algs()
2045 static int cs_dsp_halo_create_regions(struct cs_dsp *dsp, __be32 id, __be32 ver, in cs_dsp_halo_create_regions() argument
2054 return cs_dsp_create_regions(dsp, id, ver, ARRAY_SIZE(types), types, bases); in cs_dsp_halo_create_regions()
2057 static int cs_dsp_halo_setup_algs(struct cs_dsp *dsp) in cs_dsp_halo_setup_algs() argument
2066 mem = cs_dsp_find_region(dsp, WMFW_ADSP2_XM); in cs_dsp_halo_setup_algs()
2068 return -EINVAL; in cs_dsp_halo_setup_algs()
2070 ret = regmap_raw_read(dsp->regmap, mem->base, &halo_id, in cs_dsp_halo_setup_algs()
2073 cs_dsp_err(dsp, "Failed to read algorithm info: %d\n", in cs_dsp_halo_setup_algs()
2080 cs_dsp_parse_wmfw_v3_id_header(dsp, &halo_id.fw, n_algs); in cs_dsp_halo_setup_algs()
2082 ret = cs_dsp_halo_create_regions(dsp, halo_id.fw.id, halo_id.fw.ver, in cs_dsp_halo_setup_algs()
2087 /* Calculate offset and length in DSP words */ in cs_dsp_halo_setup_algs()
2091 halo_alg = cs_dsp_read_algs(dsp, n_algs, mem, pos, len); in cs_dsp_halo_setup_algs()
2096 cs_dsp_dbg(dsp, in cs_dsp_halo_setup_algs()
2105 ret = cs_dsp_halo_create_regions(dsp, halo_alg[i].alg.id, in cs_dsp_halo_setup_algs()
2118 static int cs_dsp_load_coeff(struct cs_dsp *dsp, const struct firmware *firmware, in cs_dsp_load_coeff() argument
2122 struct regmap *regmap = dsp->regmap; in cs_dsp_load_coeff()
2135 ret = -EINVAL; in cs_dsp_load_coeff()
2137 if (sizeof(*hdr) >= firmware->size) { in cs_dsp_load_coeff()
2138 cs_dsp_err(dsp, "%s: coefficient file too short, %zu bytes\n", in cs_dsp_load_coeff()
2139 file, firmware->size); in cs_dsp_load_coeff()
2143 hdr = (void *)&firmware->data[0]; in cs_dsp_load_coeff()
2144 if (memcmp(hdr->magic, "WMDR", 4) != 0) { in cs_dsp_load_coeff()
2145 cs_dsp_err(dsp, "%s: invalid coefficient magic\n", file); in cs_dsp_load_coeff()
2149 switch (be32_to_cpu(hdr->rev) & 0xff) { in cs_dsp_load_coeff()
2154 cs_dsp_err(dsp, "%s: Unsupported coefficient file format %d\n", in cs_dsp_load_coeff()
2155 file, be32_to_cpu(hdr->rev) & 0xff); in cs_dsp_load_coeff()
2156 ret = -EINVAL; in cs_dsp_load_coeff()
2160 cs_dsp_info(dsp, "%s: v%d.%d.%d\n", file, in cs_dsp_load_coeff()
2161 (le32_to_cpu(hdr->ver) >> 16) & 0xff, in cs_dsp_load_coeff()
2162 (le32_to_cpu(hdr->ver) >> 8) & 0xff, in cs_dsp_load_coeff()
2163 le32_to_cpu(hdr->ver) & 0xff); in cs_dsp_load_coeff()
2165 pos = le32_to_cpu(hdr->len); in cs_dsp_load_coeff()
2168 while (pos < firmware->size) { in cs_dsp_load_coeff()
2170 if (sizeof(*blk) > firmware->size - pos) { in cs_dsp_load_coeff()
2171 ret = -EOVERFLOW; in cs_dsp_load_coeff()
2175 blk = (void *)(&firmware->data[pos]); in cs_dsp_load_coeff()
2177 if (le32_to_cpu(blk->len) > firmware->size - pos - sizeof(*blk)) { in cs_dsp_load_coeff()
2178 ret = -EOVERFLOW; in cs_dsp_load_coeff()
2182 type = le16_to_cpu(blk->type); in cs_dsp_load_coeff()
2183 offset = le16_to_cpu(blk->offset); in cs_dsp_load_coeff()
2184 version = le32_to_cpu(blk->ver) >> 8; in cs_dsp_load_coeff()
2186 cs_dsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n", in cs_dsp_load_coeff()
2187 file, blocks, le32_to_cpu(blk->id), in cs_dsp_load_coeff()
2188 (le32_to_cpu(blk->ver) >> 16) & 0xff, in cs_dsp_load_coeff()
2189 (le32_to_cpu(blk->ver) >> 8) & 0xff, in cs_dsp_load_coeff()
2190 le32_to_cpu(blk->ver) & 0xff); in cs_dsp_load_coeff()
2191 cs_dsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n", in cs_dsp_load_coeff()
2192 file, blocks, le32_to_cpu(blk->len), offset, type); in cs_dsp_load_coeff()
2198 text = kzalloc(le32_to_cpu(blk->len) + 1, GFP_KERNEL); in cs_dsp_load_coeff()
2208 if (le32_to_cpu(blk->id) == dsp->fw_id && in cs_dsp_load_coeff()
2211 mem = cs_dsp_find_region(dsp, type); in cs_dsp_load_coeff()
2213 cs_dsp_err(dsp, "No ZM\n"); in cs_dsp_load_coeff()
2216 reg = dsp->ops->region_to_reg(mem, 0); in cs_dsp_load_coeff()
2231 cs_dsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n", in cs_dsp_load_coeff()
2232 file, blocks, le32_to_cpu(blk->len), in cs_dsp_load_coeff()
2233 type, le32_to_cpu(blk->id)); in cs_dsp_load_coeff()
2236 mem = cs_dsp_find_region(dsp, type); in cs_dsp_load_coeff()
2238 cs_dsp_err(dsp, "No base for region %x\n", type); in cs_dsp_load_coeff()
2242 alg_region = cs_dsp_find_alg_region(dsp, type, in cs_dsp_load_coeff()
2243 le32_to_cpu(blk->id)); in cs_dsp_load_coeff()
2245 if (version != alg_region->ver) in cs_dsp_load_coeff()
2246 cs_dsp_warn(dsp, in cs_dsp_load_coeff()
2251 (alg_region->ver >> 16) & 0xFF, in cs_dsp_load_coeff()
2252 (alg_region->ver >> 8) & 0xFF, in cs_dsp_load_coeff()
2253 alg_region->ver & 0xFF); in cs_dsp_load_coeff()
2255 reg = alg_region->base; in cs_dsp_load_coeff()
2256 reg = dsp->ops->region_to_reg(mem, reg); in cs_dsp_load_coeff()
2259 cs_dsp_err(dsp, "No %s for algorithm %x\n", in cs_dsp_load_coeff()
2260 region_name, le32_to_cpu(blk->id)); in cs_dsp_load_coeff()
2265 cs_dsp_err(dsp, "%s.%d: Unknown region type %x at %d\n", in cs_dsp_load_coeff()
2271 memcpy(text, blk->data, le32_to_cpu(blk->len)); in cs_dsp_load_coeff()
2272 cs_dsp_info(dsp, "%s: %s\n", dsp->fw_name, text); in cs_dsp_load_coeff()
2278 buf = cs_dsp_buf_alloc(blk->data, in cs_dsp_load_coeff()
2279 le32_to_cpu(blk->len), in cs_dsp_load_coeff()
2282 cs_dsp_err(dsp, "Out of memory\n"); in cs_dsp_load_coeff()
2283 ret = -ENOMEM; in cs_dsp_load_coeff()
2287 cs_dsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n", in cs_dsp_load_coeff()
2288 file, blocks, le32_to_cpu(blk->len), in cs_dsp_load_coeff()
2290 ret = regmap_raw_write_async(regmap, reg, buf->buf, in cs_dsp_load_coeff()
2291 le32_to_cpu(blk->len)); in cs_dsp_load_coeff()
2293 cs_dsp_err(dsp, in cs_dsp_load_coeff()
2299 pos += (le32_to_cpu(blk->len) + sizeof(*blk) + 3) & ~0x03; in cs_dsp_load_coeff()
2305 cs_dsp_err(dsp, "Failed to complete async write: %d\n", ret); in cs_dsp_load_coeff()
2307 if (pos > firmware->size) in cs_dsp_load_coeff()
2308 cs_dsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", in cs_dsp_load_coeff()
2309 file, blocks, pos - firmware->size); in cs_dsp_load_coeff()
2311 cs_dsp_debugfs_save_binname(dsp, file); in cs_dsp_load_coeff()
2318 if (ret == -EOVERFLOW) in cs_dsp_load_coeff()
2319 cs_dsp_err(dsp, "%s: file content overflows file data\n", file); in cs_dsp_load_coeff()
2324 static int cs_dsp_create_name(struct cs_dsp *dsp) in cs_dsp_create_name() argument
2326 if (!dsp->name) { in cs_dsp_create_name()
2327 dsp->name = devm_kasprintf(dsp->dev, GFP_KERNEL, "DSP%d", in cs_dsp_create_name()
2328 dsp->num); in cs_dsp_create_name()
2329 if (!dsp->name) in cs_dsp_create_name()
2330 return -ENOMEM; in cs_dsp_create_name()
2336 static int cs_dsp_common_init(struct cs_dsp *dsp) in cs_dsp_common_init() argument
2340 ret = cs_dsp_create_name(dsp); in cs_dsp_common_init()
2344 INIT_LIST_HEAD(&dsp->alg_regions); in cs_dsp_common_init()
2345 INIT_LIST_HEAD(&dsp->ctl_list); in cs_dsp_common_init()
2347 mutex_init(&dsp->pwr_lock); in cs_dsp_common_init()
2351 dsp->debugfs_root = ERR_PTR(-ENODEV); in cs_dsp_common_init()
2358 * cs_dsp_adsp1_init() - Initialise a cs_dsp structure representing a ADSP1 device
2359 * @dsp: pointer to DSP structure
2363 int cs_dsp_adsp1_init(struct cs_dsp *dsp) in cs_dsp_adsp1_init() argument
2365 dsp->ops = &cs_dsp_adsp1_ops; in cs_dsp_adsp1_init()
2367 return cs_dsp_common_init(dsp); in cs_dsp_adsp1_init()
2372 * cs_dsp_adsp1_power_up() - Load and start the named firmware
2373 * @dsp: pointer to DSP structure
2375 * @wmfw_filename: file name of firmware to be sent
2377 * @coeff_filename: file name of coefficient to data be sent
2378 * @fw_name: the user-friendly firmware name
2382 int cs_dsp_adsp1_power_up(struct cs_dsp *dsp, in cs_dsp_adsp1_power_up() argument
2390 mutex_lock(&dsp->pwr_lock); in cs_dsp_adsp1_power_up()
2392 dsp->fw_name = fw_name; in cs_dsp_adsp1_power_up()
2394 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, in cs_dsp_adsp1_power_up()
2398 * For simplicity set the DSP clock rate to be the in cs_dsp_adsp1_power_up()
2401 if (dsp->sysclk_reg) { in cs_dsp_adsp1_power_up()
2402 ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val); in cs_dsp_adsp1_power_up()
2404 cs_dsp_err(dsp, "Failed to read SYSCLK state: %d\n", ret); in cs_dsp_adsp1_power_up()
2408 val = (val & dsp->sysclk_mask) >> dsp->sysclk_shift; in cs_dsp_adsp1_power_up()
2410 ret = regmap_update_bits(dsp->regmap, in cs_dsp_adsp1_power_up()
2411 dsp->base + ADSP1_CONTROL_31, in cs_dsp_adsp1_power_up()
2414 cs_dsp_err(dsp, "Failed to set clock rate: %d\n", ret); in cs_dsp_adsp1_power_up()
2419 ret = cs_dsp_load(dsp, wmfw_firmware, wmfw_filename); in cs_dsp_adsp1_power_up()
2423 ret = cs_dsp_adsp1_setup_algs(dsp); in cs_dsp_adsp1_power_up()
2427 ret = cs_dsp_load_coeff(dsp, coeff_firmware, coeff_filename); in cs_dsp_adsp1_power_up()
2432 ret = cs_dsp_coeff_init_control_caches(dsp); in cs_dsp_adsp1_power_up()
2437 ret = cs_dsp_coeff_sync_controls(dsp); in cs_dsp_adsp1_power_up()
2441 dsp->booted = true; in cs_dsp_adsp1_power_up()
2444 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, in cs_dsp_adsp1_power_up()
2448 dsp->running = true; in cs_dsp_adsp1_power_up()
2450 mutex_unlock(&dsp->pwr_lock); in cs_dsp_adsp1_power_up()
2455 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, in cs_dsp_adsp1_power_up()
2458 mutex_unlock(&dsp->pwr_lock); in cs_dsp_adsp1_power_up()
2464 * cs_dsp_adsp1_power_down() - Halts the DSP
2465 * @dsp: pointer to DSP structure
2467 void cs_dsp_adsp1_power_down(struct cs_dsp *dsp) in cs_dsp_adsp1_power_down() argument
2471 mutex_lock(&dsp->pwr_lock); in cs_dsp_adsp1_power_down()
2473 dsp->running = false; in cs_dsp_adsp1_power_down()
2474 dsp->booted = false; in cs_dsp_adsp1_power_down()
2477 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, in cs_dsp_adsp1_power_down()
2480 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19, in cs_dsp_adsp1_power_down()
2483 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, in cs_dsp_adsp1_power_down()
2486 list_for_each_entry(ctl, &dsp->ctl_list, list) in cs_dsp_adsp1_power_down()
2487 ctl->enabled = 0; in cs_dsp_adsp1_power_down()
2489 cs_dsp_free_alg_regions(dsp); in cs_dsp_adsp1_power_down()
2491 mutex_unlock(&dsp->pwr_lock); in cs_dsp_adsp1_power_down()
2495 static int cs_dsp_adsp2v2_enable_core(struct cs_dsp *dsp) in cs_dsp_adsp2v2_enable_core() argument
2502 ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, &val); in cs_dsp_adsp2v2_enable_core()
2513 cs_dsp_err(dsp, "Failed to start DSP RAM\n"); in cs_dsp_adsp2v2_enable_core()
2514 return -EBUSY; in cs_dsp_adsp2v2_enable_core()
2517 cs_dsp_dbg(dsp, "RAM ready after %d polls\n", count); in cs_dsp_adsp2v2_enable_core()
2522 static int cs_dsp_adsp2_enable_core(struct cs_dsp *dsp) in cs_dsp_adsp2_enable_core() argument
2526 ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_enable_core()
2531 return cs_dsp_adsp2v2_enable_core(dsp); in cs_dsp_adsp2_enable_core()
2534 static int cs_dsp_adsp2_lock(struct cs_dsp *dsp, unsigned int lock_regions) in cs_dsp_adsp2_lock() argument
2536 struct regmap *regmap = dsp->regmap; in cs_dsp_adsp2_lock()
2543 lock_reg = dsp->base + ADSP2_LOCK_REGION_1_LOCK_REGION_0; in cs_dsp_adsp2_lock()
2564 static int cs_dsp_adsp2_enable_memory(struct cs_dsp *dsp) in cs_dsp_adsp2_enable_memory() argument
2566 return regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_enable_memory()
2570 static void cs_dsp_adsp2_disable_memory(struct cs_dsp *dsp) in cs_dsp_adsp2_disable_memory() argument
2572 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_disable_memory()
2576 static void cs_dsp_adsp2_disable_core(struct cs_dsp *dsp) in cs_dsp_adsp2_disable_core() argument
2578 regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0); in cs_dsp_adsp2_disable_core()
2579 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0); in cs_dsp_adsp2_disable_core()
2580 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0); in cs_dsp_adsp2_disable_core()
2582 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_disable_core()
2586 static void cs_dsp_adsp2v2_disable_core(struct cs_dsp *dsp) in cs_dsp_adsp2v2_disable_core() argument
2588 regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0); in cs_dsp_adsp2v2_disable_core()
2589 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0); in cs_dsp_adsp2v2_disable_core()
2590 regmap_write(dsp->regmap, dsp->base + ADSP2V2_WDMA_CONFIG_2, 0); in cs_dsp_adsp2v2_disable_core()
2593 static int cs_dsp_halo_configure_mpu(struct cs_dsp *dsp, unsigned int lock_regions) in cs_dsp_halo_configure_mpu() argument
2595 struct reg_sequence config[] = { in cs_dsp_halo_configure_mpu() local
2596 { dsp->base + HALO_MPU_LOCK_CONFIG, 0x5555 }, in cs_dsp_halo_configure_mpu()
2597 { dsp->base + HALO_MPU_LOCK_CONFIG, 0xAAAA }, in cs_dsp_halo_configure_mpu()
2598 { dsp->base + HALO_MPU_XMEM_ACCESS_0, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2599 { dsp->base + HALO_MPU_YMEM_ACCESS_0, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2600 { dsp->base + HALO_MPU_WINDOW_ACCESS_0, lock_regions }, in cs_dsp_halo_configure_mpu()
2601 { dsp->base + HALO_MPU_XREG_ACCESS_0, lock_regions }, in cs_dsp_halo_configure_mpu()
2602 { dsp->base + HALO_MPU_YREG_ACCESS_0, lock_regions }, in cs_dsp_halo_configure_mpu()
2603 { dsp->base + HALO_MPU_XMEM_ACCESS_1, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2604 { dsp->base + HALO_MPU_YMEM_ACCESS_1, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2605 { dsp->base + HALO_MPU_WINDOW_ACCESS_1, lock_regions }, in cs_dsp_halo_configure_mpu()
2606 { dsp->base + HALO_MPU_XREG_ACCESS_1, lock_regions }, in cs_dsp_halo_configure_mpu()
2607 { dsp->base + HALO_MPU_YREG_ACCESS_1, lock_regions }, in cs_dsp_halo_configure_mpu()
2608 { dsp->base + HALO_MPU_XMEM_ACCESS_2, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2609 { dsp->base + HALO_MPU_YMEM_ACCESS_2, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2610 { dsp->base + HALO_MPU_WINDOW_ACCESS_2, lock_regions }, in cs_dsp_halo_configure_mpu()
2611 { dsp->base + HALO_MPU_XREG_ACCESS_2, lock_regions }, in cs_dsp_halo_configure_mpu()
2612 { dsp->base + HALO_MPU_YREG_ACCESS_2, lock_regions }, in cs_dsp_halo_configure_mpu()
2613 { dsp->base + HALO_MPU_XMEM_ACCESS_3, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2614 { dsp->base + HALO_MPU_YMEM_ACCESS_3, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2615 { dsp->base + HALO_MPU_WINDOW_ACCESS_3, lock_regions }, in cs_dsp_halo_configure_mpu()
2616 { dsp->base + HALO_MPU_XREG_ACCESS_3, lock_regions }, in cs_dsp_halo_configure_mpu()
2617 { dsp->base + HALO_MPU_YREG_ACCESS_3, lock_regions }, in cs_dsp_halo_configure_mpu()
2618 { dsp->base + HALO_MPU_LOCK_CONFIG, 0 }, in cs_dsp_halo_configure_mpu()
2621 return regmap_multi_reg_write(dsp->regmap, config, ARRAY_SIZE(config)); in cs_dsp_halo_configure_mpu()
2625 * cs_dsp_set_dspclk() - Applies the given frequency to the given cs_dsp
2626 * @dsp: pointer to DSP structure
2633 int cs_dsp_set_dspclk(struct cs_dsp *dsp, unsigned int freq) in cs_dsp_set_dspclk() argument
2637 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CLOCKING, in cs_dsp_set_dspclk()
2641 cs_dsp_err(dsp, "Failed to set clock rate: %d\n", ret); in cs_dsp_set_dspclk()
2647 static void cs_dsp_stop_watchdog(struct cs_dsp *dsp) in cs_dsp_stop_watchdog() argument
2649 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_WATCHDOG, in cs_dsp_stop_watchdog()
2653 static void cs_dsp_halo_stop_watchdog(struct cs_dsp *dsp) in cs_dsp_halo_stop_watchdog() argument
2655 regmap_update_bits(dsp->regmap, dsp->base + HALO_WDT_CONTROL, in cs_dsp_halo_stop_watchdog()
2660 * cs_dsp_power_up() - Downloads firmware to the DSP
2661 * @dsp: pointer to DSP structure
2663 * @wmfw_filename: file name of firmware to be sent
2665 * @coeff_filename: file name of coefficient to data be sent
2666 * @fw_name: the user-friendly firmware name
2668 * This function is used on ADSP2 and Halo DSP cores, it powers-up the DSP core
2670 * cs_dsp booted flag will be set once completed and if the core has a low-power
2676 int cs_dsp_power_up(struct cs_dsp *dsp, in cs_dsp_power_up() argument
2683 mutex_lock(&dsp->pwr_lock); in cs_dsp_power_up()
2685 dsp->fw_name = fw_name; in cs_dsp_power_up()
2687 if (dsp->ops->enable_memory) { in cs_dsp_power_up()
2688 ret = dsp->ops->enable_memory(dsp); in cs_dsp_power_up()
2693 if (dsp->ops->enable_core) { in cs_dsp_power_up()
2694 ret = dsp->ops->enable_core(dsp); in cs_dsp_power_up()
2699 ret = cs_dsp_load(dsp, wmfw_firmware, wmfw_filename); in cs_dsp_power_up()
2703 ret = dsp->ops->setup_algs(dsp); in cs_dsp_power_up()
2707 ret = cs_dsp_load_coeff(dsp, coeff_firmware, coeff_filename); in cs_dsp_power_up()
2712 ret = cs_dsp_coeff_init_control_caches(dsp); in cs_dsp_power_up()
2716 if (dsp->ops->disable_core) in cs_dsp_power_up()
2717 dsp->ops->disable_core(dsp); in cs_dsp_power_up()
2719 dsp->booted = true; in cs_dsp_power_up()
2721 mutex_unlock(&dsp->pwr_lock); in cs_dsp_power_up()
2725 if (dsp->ops->disable_core) in cs_dsp_power_up()
2726 dsp->ops->disable_core(dsp); in cs_dsp_power_up()
2728 if (dsp->ops->disable_memory) in cs_dsp_power_up()
2729 dsp->ops->disable_memory(dsp); in cs_dsp_power_up()
2731 mutex_unlock(&dsp->pwr_lock); in cs_dsp_power_up()
2738 * cs_dsp_power_down() - Powers-down the DSP
2739 * @dsp: pointer to DSP structure
2744 void cs_dsp_power_down(struct cs_dsp *dsp) in cs_dsp_power_down() argument
2748 mutex_lock(&dsp->pwr_lock); in cs_dsp_power_down()
2750 cs_dsp_debugfs_clear(dsp); in cs_dsp_power_down()
2752 dsp->fw_id = 0; in cs_dsp_power_down()
2753 dsp->fw_id_version = 0; in cs_dsp_power_down()
2755 dsp->booted = false; in cs_dsp_power_down()
2757 if (dsp->ops->disable_memory) in cs_dsp_power_down()
2758 dsp->ops->disable_memory(dsp); in cs_dsp_power_down()
2760 list_for_each_entry(ctl, &dsp->ctl_list, list) in cs_dsp_power_down()
2761 ctl->enabled = 0; in cs_dsp_power_down()
2763 cs_dsp_free_alg_regions(dsp); in cs_dsp_power_down()
2765 mutex_unlock(&dsp->pwr_lock); in cs_dsp_power_down()
2767 cs_dsp_dbg(dsp, "Shutdown complete\n"); in cs_dsp_power_down()
2771 static int cs_dsp_adsp2_start_core(struct cs_dsp *dsp) in cs_dsp_adsp2_start_core() argument
2773 return regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_start_core()
2778 static void cs_dsp_adsp2_stop_core(struct cs_dsp *dsp) in cs_dsp_adsp2_stop_core() argument
2780 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_stop_core()
2785 * cs_dsp_run() - Starts the firmware running
2786 * @dsp: pointer to DSP structure
2792 int cs_dsp_run(struct cs_dsp *dsp) in cs_dsp_run() argument
2796 mutex_lock(&dsp->pwr_lock); in cs_dsp_run()
2798 if (!dsp->booted) { in cs_dsp_run()
2799 ret = -EIO; in cs_dsp_run()
2803 if (dsp->ops->enable_core) { in cs_dsp_run()
2804 ret = dsp->ops->enable_core(dsp); in cs_dsp_run()
2809 if (dsp->client_ops->pre_run) { in cs_dsp_run()
2810 ret = dsp->client_ops->pre_run(dsp); in cs_dsp_run()
2816 ret = cs_dsp_coeff_sync_controls(dsp); in cs_dsp_run()
2820 if (dsp->ops->lock_memory) { in cs_dsp_run()
2821 ret = dsp->ops->lock_memory(dsp, dsp->lock_regions); in cs_dsp_run()
2823 cs_dsp_err(dsp, "Error configuring MPU: %d\n", ret); in cs_dsp_run()
2828 if (dsp->ops->start_core) { in cs_dsp_run()
2829 ret = dsp->ops->start_core(dsp); in cs_dsp_run()
2834 dsp->running = true; in cs_dsp_run()
2836 if (dsp->client_ops->post_run) { in cs_dsp_run()
2837 ret = dsp->client_ops->post_run(dsp); in cs_dsp_run()
2842 mutex_unlock(&dsp->pwr_lock); in cs_dsp_run()
2847 if (dsp->ops->stop_core) in cs_dsp_run()
2848 dsp->ops->stop_core(dsp); in cs_dsp_run()
2849 if (dsp->ops->disable_core) in cs_dsp_run()
2850 dsp->ops->disable_core(dsp); in cs_dsp_run()
2851 mutex_unlock(&dsp->pwr_lock); in cs_dsp_run()
2858 * cs_dsp_stop() - Stops the firmware
2859 * @dsp: pointer to DSP structure
2863 void cs_dsp_stop(struct cs_dsp *dsp) in cs_dsp_stop() argument
2866 cs_dsp_signal_event_controls(dsp, CS_DSP_FW_EVENT_SHUTDOWN); in cs_dsp_stop()
2868 if (dsp->ops->stop_watchdog) in cs_dsp_stop()
2869 dsp->ops->stop_watchdog(dsp); in cs_dsp_stop()
2872 if (dsp->ops->show_fw_status) in cs_dsp_stop()
2873 dsp->ops->show_fw_status(dsp); in cs_dsp_stop()
2875 mutex_lock(&dsp->pwr_lock); in cs_dsp_stop()
2877 if (dsp->client_ops->pre_stop) in cs_dsp_stop()
2878 dsp->client_ops->pre_stop(dsp); in cs_dsp_stop()
2880 dsp->running = false; in cs_dsp_stop()
2882 if (dsp->ops->stop_core) in cs_dsp_stop()
2883 dsp->ops->stop_core(dsp); in cs_dsp_stop()
2884 if (dsp->ops->disable_core) in cs_dsp_stop()
2885 dsp->ops->disable_core(dsp); in cs_dsp_stop()
2887 if (dsp->client_ops->post_stop) in cs_dsp_stop()
2888 dsp->client_ops->post_stop(dsp); in cs_dsp_stop()
2890 mutex_unlock(&dsp->pwr_lock); in cs_dsp_stop()
2892 cs_dsp_dbg(dsp, "Execution stopped\n"); in cs_dsp_stop()
2896 static int cs_dsp_halo_start_core(struct cs_dsp *dsp) in cs_dsp_halo_start_core() argument
2900 ret = regmap_update_bits(dsp->regmap, dsp->base + HALO_CCM_CORE_CONTROL, in cs_dsp_halo_start_core()
2906 return regmap_update_bits(dsp->regmap, dsp->base + HALO_CCM_CORE_CONTROL, in cs_dsp_halo_start_core()
2910 static void cs_dsp_halo_stop_core(struct cs_dsp *dsp) in cs_dsp_halo_stop_core() argument
2912 regmap_update_bits(dsp->regmap, dsp->base + HALO_CCM_CORE_CONTROL, in cs_dsp_halo_stop_core()
2916 regmap_update_bits(dsp->regmap, dsp->base + HALO_CORE_SOFT_RESET, in cs_dsp_halo_stop_core()
2921 * cs_dsp_adsp2_init() - Initialise a cs_dsp structure representing a ADSP2 core
2922 * @dsp: pointer to DSP structure
2926 int cs_dsp_adsp2_init(struct cs_dsp *dsp) in cs_dsp_adsp2_init() argument
2930 switch (dsp->rev) { in cs_dsp_adsp2_init()
2933 * Disable the DSP memory by default when in reset for a small in cs_dsp_adsp2_init()
2936 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_init()
2939 cs_dsp_err(dsp, in cs_dsp_adsp2_init()
2944 dsp->ops = &cs_dsp_adsp2_ops[0]; in cs_dsp_adsp2_init()
2947 dsp->ops = &cs_dsp_adsp2_ops[1]; in cs_dsp_adsp2_init()
2950 dsp->ops = &cs_dsp_adsp2_ops[2]; in cs_dsp_adsp2_init()
2954 return cs_dsp_common_init(dsp); in cs_dsp_adsp2_init()
2959 * cs_dsp_halo_init() - Initialise a cs_dsp structure representing a HALO Core DSP
2960 * @dsp: pointer to DSP structure
2964 int cs_dsp_halo_init(struct cs_dsp *dsp) in cs_dsp_halo_init() argument
2966 if (dsp->no_core_startstop) in cs_dsp_halo_init()
2967 dsp->ops = &cs_dsp_halo_ao_ops; in cs_dsp_halo_init()
2969 dsp->ops = &cs_dsp_halo_ops; in cs_dsp_halo_init()
2971 return cs_dsp_common_init(dsp); in cs_dsp_halo_init()
2976 * cs_dsp_remove() - Clean a cs_dsp before deletion
2977 * @dsp: pointer to DSP structure
2979 void cs_dsp_remove(struct cs_dsp *dsp) in cs_dsp_remove() argument
2983 while (!list_empty(&dsp->ctl_list)) { in cs_dsp_remove()
2984 ctl = list_first_entry(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list); in cs_dsp_remove()
2986 if (dsp->client_ops->control_remove) in cs_dsp_remove()
2987 dsp->client_ops->control_remove(ctl); in cs_dsp_remove()
2989 list_del(&ctl->list); in cs_dsp_remove()
2996 * cs_dsp_read_raw_data_block() - Reads a block of data from DSP memory
2997 * @dsp: pointer to DSP structure
2998 * @mem_type: the type of DSP memory containing the data to be read
3003 * If this is used to read unpacked 24-bit memory, each 24-bit DSP word will
3004 * occupy 32-bits in data (MSbyte will be 0). This padding can be removed using
3009 int cs_dsp_read_raw_data_block(struct cs_dsp *dsp, int mem_type, unsigned int mem_addr, in cs_dsp_read_raw_data_block() argument
3012 struct cs_dsp_region const *mem = cs_dsp_find_region(dsp, mem_type); in cs_dsp_read_raw_data_block()
3016 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_read_raw_data_block()
3019 return -EINVAL; in cs_dsp_read_raw_data_block()
3021 reg = dsp->ops->region_to_reg(mem, mem_addr); in cs_dsp_read_raw_data_block()
3023 ret = regmap_raw_read(dsp->regmap, reg, data, in cs_dsp_read_raw_data_block()
3033 * cs_dsp_read_data_word() - Reads a word from DSP memory
3034 * @dsp: pointer to DSP structure
3035 * @mem_type: the type of DSP memory containing the data to be read
3041 int cs_dsp_read_data_word(struct cs_dsp *dsp, int mem_type, unsigned int mem_addr, u32 *data) in cs_dsp_read_data_word() argument
3046 ret = cs_dsp_read_raw_data_block(dsp, mem_type, mem_addr, 1, &raw); in cs_dsp_read_data_word()
3057 * cs_dsp_write_data_word() - Writes a word to DSP memory
3058 * @dsp: pointer to DSP structure
3059 * @mem_type: the type of DSP memory containing the data to be written
3065 int cs_dsp_write_data_word(struct cs_dsp *dsp, int mem_type, unsigned int mem_addr, u32 data) in cs_dsp_write_data_word() argument
3067 struct cs_dsp_region const *mem = cs_dsp_find_region(dsp, mem_type); in cs_dsp_write_data_word()
3071 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_write_data_word()
3074 return -EINVAL; in cs_dsp_write_data_word()
3076 reg = dsp->ops->region_to_reg(mem, mem_addr); in cs_dsp_write_data_word()
3078 return regmap_raw_write(dsp->regmap, reg, &val, sizeof(val)); in cs_dsp_write_data_word()
3083 * cs_dsp_remove_padding() - Convert unpacked words to packed bytes
3084 * @buf: buffer containing DSP words read from DSP memory
3087 * DSP words from the register map have pad bytes and the data bytes
3107 * cs_dsp_adsp2_bus_error() - Handle a DSP bus error interrupt
3108 * @dsp: pointer to DSP structure
3110 * The firmware and DSP state will be logged for future analysis.
3112 void cs_dsp_adsp2_bus_error(struct cs_dsp *dsp) in cs_dsp_adsp2_bus_error() argument
3115 struct regmap *regmap = dsp->regmap; in cs_dsp_adsp2_bus_error()
3118 mutex_lock(&dsp->pwr_lock); in cs_dsp_adsp2_bus_error()
3120 ret = regmap_read(regmap, dsp->base + ADSP2_LOCK_REGION_CTRL, &val); in cs_dsp_adsp2_bus_error()
3122 cs_dsp_err(dsp, in cs_dsp_adsp2_bus_error()
3128 cs_dsp_err(dsp, "watchdog timeout error\n"); in cs_dsp_adsp2_bus_error()
3129 dsp->ops->stop_watchdog(dsp); in cs_dsp_adsp2_bus_error()
3130 if (dsp->client_ops->watchdog_expired) in cs_dsp_adsp2_bus_error()
3131 dsp->client_ops->watchdog_expired(dsp); in cs_dsp_adsp2_bus_error()
3136 cs_dsp_err(dsp, "bus error: address error\n"); in cs_dsp_adsp2_bus_error()
3138 cs_dsp_err(dsp, "bus error: region lock error\n"); in cs_dsp_adsp2_bus_error()
3140 ret = regmap_read(regmap, dsp->base + ADSP2_BUS_ERR_ADDR, &val); in cs_dsp_adsp2_bus_error()
3142 cs_dsp_err(dsp, in cs_dsp_adsp2_bus_error()
3148 cs_dsp_err(dsp, "bus error address = 0x%x\n", in cs_dsp_adsp2_bus_error()
3152 dsp->base + ADSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR, in cs_dsp_adsp2_bus_error()
3155 cs_dsp_err(dsp, in cs_dsp_adsp2_bus_error()
3161 cs_dsp_err(dsp, "xmem error address = 0x%x\n", in cs_dsp_adsp2_bus_error()
3163 cs_dsp_err(dsp, "pmem error address = 0x%x\n", in cs_dsp_adsp2_bus_error()
3168 regmap_update_bits(regmap, dsp->base + ADSP2_LOCK_REGION_CTRL, in cs_dsp_adsp2_bus_error()
3172 mutex_unlock(&dsp->pwr_lock); in cs_dsp_adsp2_bus_error()
3177 * cs_dsp_halo_bus_error() - Handle a DSP bus error interrupt
3178 * @dsp: pointer to DSP structure
3180 * The firmware and DSP state will be logged for future analysis.
3182 void cs_dsp_halo_bus_error(struct cs_dsp *dsp) in cs_dsp_halo_bus_error() argument
3184 struct regmap *regmap = dsp->regmap; in cs_dsp_halo_bus_error()
3187 { dsp->base + HALO_MPU_XM_VIO_STATUS, 0x0 }, in cs_dsp_halo_bus_error()
3188 { dsp->base + HALO_MPU_YM_VIO_STATUS, 0x0 }, in cs_dsp_halo_bus_error()
3189 { dsp->base + HALO_MPU_PM_VIO_STATUS, 0x0 }, in cs_dsp_halo_bus_error()
3193 mutex_lock(&dsp->pwr_lock); in cs_dsp_halo_bus_error()
3195 ret = regmap_read(regmap, dsp->base_sysinfo + HALO_AHBM_WINDOW_DEBUG_1, in cs_dsp_halo_bus_error()
3198 cs_dsp_warn(dsp, "Failed to read AHB DEBUG_1: %d\n", ret); in cs_dsp_halo_bus_error()
3202 cs_dsp_warn(dsp, "AHB: STATUS: 0x%x ADDR: 0x%x\n", in cs_dsp_halo_bus_error()
3207 ret = regmap_read(regmap, dsp->base_sysinfo + HALO_AHBM_WINDOW_DEBUG_0, in cs_dsp_halo_bus_error()
3210 cs_dsp_warn(dsp, "Failed to read AHB DEBUG_0: %d\n", ret); in cs_dsp_halo_bus_error()
3214 cs_dsp_warn(dsp, "AHB: SYS_ADDR: 0x%x\n", *fault); in cs_dsp_halo_bus_error()
3216 ret = regmap_bulk_read(regmap, dsp->base + HALO_MPU_XM_VIO_ADDR, in cs_dsp_halo_bus_error()
3219 cs_dsp_warn(dsp, "Failed to read MPU fault info: %d\n", ret); in cs_dsp_halo_bus_error()
3223 cs_dsp_warn(dsp, "XM: STATUS:0x%x ADDR:0x%x\n", fault[1], fault[0]); in cs_dsp_halo_bus_error()
3224 cs_dsp_warn(dsp, "YM: STATUS:0x%x ADDR:0x%x\n", fault[3], fault[2]); in cs_dsp_halo_bus_error()
3225 cs_dsp_warn(dsp, "PM: STATUS:0x%x ADDR:0x%x\n", fault[5], fault[4]); in cs_dsp_halo_bus_error()
3227 ret = regmap_multi_reg_write(dsp->regmap, clear, ARRAY_SIZE(clear)); in cs_dsp_halo_bus_error()
3229 cs_dsp_warn(dsp, "Failed to clear MPU status: %d\n", ret); in cs_dsp_halo_bus_error()
3232 mutex_unlock(&dsp->pwr_lock); in cs_dsp_halo_bus_error()
3237 * cs_dsp_halo_wdt_expire() - Handle DSP watchdog expiry
3238 * @dsp: pointer to DSP structure
3242 void cs_dsp_halo_wdt_expire(struct cs_dsp *dsp) in cs_dsp_halo_wdt_expire() argument
3244 mutex_lock(&dsp->pwr_lock); in cs_dsp_halo_wdt_expire()
3246 cs_dsp_warn(dsp, "WDT Expiry Fault\n"); in cs_dsp_halo_wdt_expire()
3248 dsp->ops->stop_watchdog(dsp); in cs_dsp_halo_wdt_expire()
3249 if (dsp->client_ops->watchdog_expired) in cs_dsp_halo_wdt_expire()
3250 dsp->client_ops->watchdog_expired(dsp); in cs_dsp_halo_wdt_expire()
3252 mutex_unlock(&dsp->pwr_lock); in cs_dsp_halo_wdt_expire()
3344 * cs_dsp_chunk_write() - Format data to a DSP memory chunk
3349 * This function sequentially writes values into the format required for DSP
3351 * big endian. Note that data is only committed to the chunk when a whole DSP
3360 nwrite = min(CS_DSP_DATA_WORD_BITS - ch->cachebits, nbits); in cs_dsp_chunk_write()
3362 ch->cache <<= nwrite; in cs_dsp_chunk_write()
3363 ch->cache |= val >> (nbits - nwrite); in cs_dsp_chunk_write()
3364 ch->cachebits += nwrite; in cs_dsp_chunk_write()
3365 nbits -= nwrite; in cs_dsp_chunk_write()
3367 if (ch->cachebits == CS_DSP_DATA_WORD_BITS) { in cs_dsp_chunk_write()
3369 return -ENOSPC; in cs_dsp_chunk_write()
3371 ch->cache &= 0xFFFFFF; in cs_dsp_chunk_write()
3372 for (i = 0; i < sizeof(ch->cache); i++, ch->cache <<= BITS_PER_BYTE) in cs_dsp_chunk_write()
3373 *ch->data++ = (ch->cache & 0xFF000000) >> CS_DSP_DATA_WORD_BITS; in cs_dsp_chunk_write()
3375 ch->bytes += sizeof(ch->cache); in cs_dsp_chunk_write()
3376 ch->cachebits = 0; in cs_dsp_chunk_write()
3387 * cs_dsp_chunk_flush() - Pad remaining data with zero and commit to chunk
3390 * As cs_dsp_chunk_write only writes data when a whole DSP word is ready to
3392 * function will pad that data with zeros upto a whole DSP word and write out.
3398 if (!ch->cachebits) in cs_dsp_chunk_flush()
3401 return cs_dsp_chunk_write(ch, CS_DSP_DATA_WORD_BITS - ch->cachebits, 0); in cs_dsp_chunk_flush()
3406 * cs_dsp_chunk_read() - Parse data from a DSP memory chunk
3410 * This function sequentially reads values from a DSP memory formatted buffer,
3420 if (!ch->cachebits) { in cs_dsp_chunk_read()
3422 return -ENOSPC; in cs_dsp_chunk_read()
3424 ch->cache = 0; in cs_dsp_chunk_read()
3425 ch->cachebits = CS_DSP_DATA_WORD_BITS; in cs_dsp_chunk_read()
3427 for (i = 0; i < sizeof(ch->cache); i++, ch->cache <<= BITS_PER_BYTE) in cs_dsp_chunk_read()
3428 ch->cache |= *ch->data++; in cs_dsp_chunk_read()
3430 ch->bytes += sizeof(ch->cache); in cs_dsp_chunk_read()
3433 nread = min(ch->cachebits, nbits); in cs_dsp_chunk_read()
3434 nbits -= nread; in cs_dsp_chunk_read()
3436 result = ch->cache >> ((sizeof(ch->cache) * BITS_PER_BYTE) - nread); in cs_dsp_chunk_read()
3437 ch->cache <<= nread; in cs_dsp_chunk_read()
3438 ch->cachebits -= nread; in cs_dsp_chunk_read()
3447 MODULE_DESCRIPTION("Cirrus Logic DSP Support");