Lines Matching refs:edac_dbg

597 	edac_dbg(2, "\tMTR%d CH%d: DIMMs are %sPresent (mtr)\n",  in decode_mtr()
620 edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); in decode_mtr()
622 edac_dbg(2, "\t\tELECTRICAL THROTTLING is %s\n", in decode_mtr()
625 edac_dbg(2, "\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr)); in decode_mtr()
626 edac_dbg(2, "\t\tNUMRANK: %s\n", in decode_mtr()
628 edac_dbg(2, "\t\tNUMROW: %s\n", in decode_mtr()
633 edac_dbg(2, "\t\tNUMCOL: %s\n", in decode_mtr()
638 edac_dbg(2, "\t\tSIZE: %d MB\n", dinfo->megabytes); in decode_mtr()
654 edac_dbg(2, "\t\tECC code is 8-byte-over-32-byte SECDED+ code\n"); in decode_mtr()
656 edac_dbg(2, "\t\tECC code is on Lockstep mode\n"); in decode_mtr()
665 edac_dbg(2, "\t\tScrub algorithm for x8 is on %s mode\n", in decode_mtr()
701 edac_dbg(2, "%s\n", pvt->tmp_prt_buffer); in print_dimm_size()
708 edac_dbg(2, "%s\n", pvt->tmp_prt_buffer); in print_dimm_size()
724 edac_dbg(2, "%s\n", pvt->tmp_prt_buffer); in print_dimm_size()
733 edac_dbg(2, "%s\n", pvt->tmp_prt_buffer); in print_dimm_size()
756 edac_dbg(2, "Memory Technology Registers:\n"); in i7300_init_csrows()
773 edac_dbg(2, "\t\tAMB-present CH%d = 0x%x:\n", in i7300_init_csrows()
783 edac_dbg(2, "\t\tAMB-present CH%d = 0x%x:\n", in i7300_init_csrows()
825 edac_dbg(2, "MIR%d: limit= 0x%x Branch(es) that participate: %s %s\n", in decode_mir()
849 edac_dbg(2, "AMBASE= 0x%lx\n", (long unsigned int)pvt->ambase); in i7300_get_mc_regs()
854 edac_dbg(2, "TOLM (number of 256M regions) =%u (0x%x)\n", in i7300_get_mc_regs()
858 edac_dbg(2, "Actual TOLM byte addr=%u.%03u GB (0x%x)\n", in i7300_get_mc_regs()
868 edac_dbg(0, "Memory controller operating on single mode\n"); in i7300_get_mc_regs()
870 edac_dbg(0, "Memory controller operating on %smirrored mode\n", in i7300_get_mc_regs()
873 edac_dbg(0, "Error detection is %s\n", in i7300_get_mc_regs()
875 edac_dbg(0, "Retry is %s\n", in i7300_get_mc_regs()
972 edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n", in i7300_get_devices()
976 edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", in i7300_get_devices()
980 edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n", in i7300_get_devices()
1033 edac_dbg(0, "MC: pdev bus %u dev=0x%x fn=0x%x\n", in i7300_init_one()
1055 edac_dbg(0, "MC: mci = %p\n", mci); in i7300_init_one()
1087edac_dbg(0, "MC: Setting mci->edac_cap to EDAC_FLAG_NONE because i7300_init_csrows() returned nonz… in i7300_init_one()
1090 edac_dbg(1, "MC: Enable error reporting now\n"); in i7300_init_one()
1096 edac_dbg(0, "MC: failed edac_mc_add_mc()\n"); in i7300_init_one()
1138 edac_dbg(0, "\n"); in i7300_remove_one()
1185 edac_dbg(2, "\n"); in i7300_init()
1200 edac_dbg(2, "\n"); in i7300_exit()