27 static void edac_pci_read_dword(struct pci_dev *dev, int reg, u32 *val32)  in edac_pci_read_dword()  argument
31 	ret = pci_read_config_dword(dev, reg, val32);  in edac_pci_read_dword()
37 static void edac_pci_write_dword(struct pci_dev *dev, int reg, u32 val32)  in edac_pci_write_dword()  argument
41 	ret = pci_write_config_dword(dev, reg, val32);  in edac_pci_write_dword()
74 	u32 val32;  in amd8131_pcix_init()  local
78 	edac_pci_read_dword(dev, REG_MEM_LIM, &val32);  in amd8131_pcix_init()
79 	if (val32 & MEM_LIMIT_MASK)  in amd8131_pcix_init()
80 		edac_pci_write_dword(dev, REG_MEM_LIM, val32);  in amd8131_pcix_init()
83 	edac_pci_read_dword(dev, REG_INT_CTLR, &val32);  in amd8131_pcix_init()
84 	if (val32 & INT_CTLR_DTS)  in amd8131_pcix_init()
85 		edac_pci_write_dword(dev, REG_INT_CTLR, val32);  in amd8131_pcix_init()
88 	edac_pci_read_dword(dev, REG_LNK_CTRL_A, &val32);  in amd8131_pcix_init()
89 	if (val32 & LNK_CTRL_CRCERR_A)  in amd8131_pcix_init()
90 		edac_pci_write_dword(dev, REG_LNK_CTRL_A, val32);  in amd8131_pcix_init()
93 	edac_pci_read_dword(dev, REG_LNK_CTRL_B, &val32);  in amd8131_pcix_init()
94 	if (val32 & LNK_CTRL_CRCERR_B)  in amd8131_pcix_init()
95 		edac_pci_write_dword(dev, REG_LNK_CTRL_B, val32);  in amd8131_pcix_init()
103 	edac_pci_read_dword(dev, REG_INT_CTLR, &val32);  in amd8131_pcix_init()
104 	val32 |= INT_CTLR_PERR | INT_CTLR_SERR | INT_CTLR_DTSE;  in amd8131_pcix_init()
105 	edac_pci_write_dword(dev, REG_INT_CTLR, val32);  in amd8131_pcix_init()
108 	edac_pci_read_dword(dev, REG_STS_CMD, &val32);  in amd8131_pcix_init()
109 	val32 |= STS_CMD_SERREN;  in amd8131_pcix_init()
110 	edac_pci_write_dword(dev, REG_STS_CMD, val32);  in amd8131_pcix_init()
113 	edac_pci_read_dword(dev, REG_LNK_CTRL_A, &val32);  in amd8131_pcix_init()
114 	val32 |= LNK_CTRL_CRCFEN;  in amd8131_pcix_init()
115 	edac_pci_write_dword(dev, REG_LNK_CTRL_A, val32);  in amd8131_pcix_init()
118 	edac_pci_read_dword(dev, REG_LNK_CTRL_B, &val32);  in amd8131_pcix_init()
119 	val32 |= LNK_CTRL_CRCFEN;  in amd8131_pcix_init()
120 	edac_pci_write_dword(dev, REG_LNK_CTRL_B, val32);  in amd8131_pcix_init()
125 	u32 val32;  in amd8131_pcix_exit()  local
129 	edac_pci_read_dword(dev, REG_INT_CTLR, &val32);  in amd8131_pcix_exit()
130 	val32 &= ~(INT_CTLR_PERR | INT_CTLR_SERR | INT_CTLR_DTSE);  in amd8131_pcix_exit()
131 	edac_pci_write_dword(dev, REG_INT_CTLR, val32);  in amd8131_pcix_exit()
134 	edac_pci_read_dword(dev, REG_STS_CMD, &val32);  in amd8131_pcix_exit()
135 	val32 &= ~STS_CMD_SERREN;  in amd8131_pcix_exit()
136 	edac_pci_write_dword(dev, REG_STS_CMD, val32);  in amd8131_pcix_exit()
139 	edac_pci_read_dword(dev, REG_LNK_CTRL_A, &val32);  in amd8131_pcix_exit()
140 	val32 &= ~LNK_CTRL_CRCFEN;  in amd8131_pcix_exit()
141 	edac_pci_write_dword(dev, REG_LNK_CTRL_A, val32);  in amd8131_pcix_exit()
144 	edac_pci_read_dword(dev, REG_LNK_CTRL_B, &val32);  in amd8131_pcix_exit()
145 	val32 &= ~LNK_CTRL_CRCFEN;  in amd8131_pcix_exit()
146 	edac_pci_write_dword(dev, REG_LNK_CTRL_B, val32);  in amd8131_pcix_exit()
153 	u32 val32;  in amd8131_pcix_check()  local
156 	edac_pci_read_dword(dev, REG_MEM_LIM, &val32);  in amd8131_pcix_check()
157 	if (val32 & MEM_LIMIT_MASK) {  in amd8131_pcix_check()
162 			val32 & MEM_LIMIT_DPE,  in amd8131_pcix_check()
163 			val32 & MEM_LIMIT_RSE,  in amd8131_pcix_check()
164 			val32 & MEM_LIMIT_RMA,  in amd8131_pcix_check()
165 			val32 & MEM_LIMIT_RTA,  in amd8131_pcix_check()
166 			val32 & MEM_LIMIT_STA,  in amd8131_pcix_check()
167 			val32 & MEM_LIMIT_MDPE);  in amd8131_pcix_check()
169 		val32 |= MEM_LIMIT_MASK;  in amd8131_pcix_check()
170 		edac_pci_write_dword(dev, REG_MEM_LIM, val32);  in amd8131_pcix_check()
176 	edac_pci_read_dword(dev, REG_INT_CTLR, &val32);  in amd8131_pcix_check()
177 	if (val32 & INT_CTLR_DTS) {  in amd8131_pcix_check()
180 		printk(KERN_INFO "DTS: %d\n", val32 & INT_CTLR_DTS);  in amd8131_pcix_check()
182 		val32 |= INT_CTLR_DTS;  in amd8131_pcix_check()
183 		edac_pci_write_dword(dev, REG_INT_CTLR, val32);  in amd8131_pcix_check()
189 	edac_pci_read_dword(dev, REG_LNK_CTRL_A, &val32);  in amd8131_pcix_check()
190 	if (val32 & LNK_CTRL_CRCERR_A) {  in amd8131_pcix_check()
193 		printk(KERN_INFO "CRCERR: %d\n", val32 & LNK_CTRL_CRCERR_A);  in amd8131_pcix_check()
195 		val32 |= LNK_CTRL_CRCERR_A;  in amd8131_pcix_check()
196 		edac_pci_write_dword(dev, REG_LNK_CTRL_A, val32);  in amd8131_pcix_check()
202 	edac_pci_read_dword(dev, REG_LNK_CTRL_B, &val32);  in amd8131_pcix_check()
203 	if (val32 & LNK_CTRL_CRCERR_B) {  in amd8131_pcix_check()
206 		printk(KERN_INFO "CRCERR: %d\n", val32 & LNK_CTRL_CRCERR_B);  in amd8131_pcix_check()
208 		val32 |= LNK_CTRL_CRCERR_B;  in amd8131_pcix_check()
209 		edac_pci_write_dword(dev, REG_LNK_CTRL_B, val32);  in amd8131_pcix_check()