Lines Matching refs:umc_base
1610 u32 i, tmp, umc_base; in umc_dump_misc_regs() local
1613 umc_base = get_umc_base(i); in umc_dump_misc_regs()
1621 amd_smn_read(pvt->mc_node_id, umc_base + UMCCH_ECC_BAD_SYMBOL, &tmp); in umc_dump_misc_regs()
1624 amd_smn_read(pvt->mc_node_id, umc_base + UMCCH_UMC_CAP, &tmp); in umc_dump_misc_regs()
1640 umc_base + get_umc_reg(pvt, UMCCH_ADDR_CFG), in umc_dump_misc_regs()
3173 u32 i, umc_base; in umc_read_mc_regs() local
3178 umc_base = get_umc_base(i); in umc_read_mc_regs()
3181 amd_smn_read(nid, umc_base + get_umc_reg(pvt, UMCCH_DIMM_CFG), &umc->dimm_cfg); in umc_read_mc_regs()
3182 amd_smn_read(nid, umc_base + UMCCH_UMC_CFG, &umc->umc_cfg); in umc_read_mc_regs()
3183 amd_smn_read(nid, umc_base + UMCCH_SDP_CTRL, &umc->sdp_ctrl); in umc_read_mc_regs()
3184 amd_smn_read(nid, umc_base + UMCCH_ECC_CTRL, &umc->ecc_ctrl); in umc_read_mc_regs()
3185 amd_smn_read(nid, umc_base + UMCCH_UMC_CAP_HI, &umc->umc_cap_hi); in umc_read_mc_regs()
3911 u32 i, umc_base; in gpu_read_mc_regs() local
3915 umc_base = gpu_get_umc_base(i, 0); in gpu_read_mc_regs()
3918 amd_smn_read(nid, umc_base + UMCCH_UMC_CFG, &umc->umc_cfg); in gpu_read_mc_regs()
3919 amd_smn_read(nid, umc_base + UMCCH_SDP_CTRL, &umc->sdp_ctrl); in gpu_read_mc_regs()
3920 amd_smn_read(nid, umc_base + UMCCH_ECC_CTRL, &umc->ecc_ctrl); in gpu_read_mc_regs()