Lines Matching refs:dc
24 static struct txx9dmac_cregs __iomem *__dma_regs(const struct txx9dmac_chan *dc) in __dma_regs() argument
26 return dc->ch_regs; in __dma_regs()
30 const struct txx9dmac_chan *dc) in __dma_regs32() argument
32 return dc->ch_regs; in __dma_regs32()
35 #define channel64_readq(dc, name) \ argument
36 __raw_readq(&(__dma_regs(dc)->name))
37 #define channel64_writeq(dc, name, val) \ argument
38 __raw_writeq((val), &(__dma_regs(dc)->name))
39 #define channel64_readl(dc, name) \ argument
40 __raw_readl(&(__dma_regs(dc)->name))
41 #define channel64_writel(dc, name, val) \ argument
42 __raw_writel((val), &(__dma_regs(dc)->name))
44 #define channel32_readl(dc, name) \ argument
45 __raw_readl(&(__dma_regs32(dc)->name))
46 #define channel32_writel(dc, name, val) \ argument
47 __raw_writel((val), &(__dma_regs32(dc)->name))
49 #define channel_readq(dc, name) channel64_readq(dc, name) argument
50 #define channel_writeq(dc, name, val) channel64_writeq(dc, name, val) argument
51 #define channel_readl(dc, name) \ argument
52 (is_dmac64(dc) ? \
53 channel64_readl(dc, name) : channel32_readl(dc, name))
54 #define channel_writel(dc, name, val) \ argument
55 (is_dmac64(dc) ? \
56 channel64_writel(dc, name, val) : channel32_writel(dc, name, val))
58 static dma_addr_t channel64_read_CHAR(const struct txx9dmac_chan *dc) in channel64_read_CHAR() argument
60 if (sizeof(__dma_regs(dc)->CHAR) == sizeof(u64)) in channel64_read_CHAR()
61 return channel64_readq(dc, CHAR); in channel64_read_CHAR()
63 return channel64_readl(dc, CHAR); in channel64_read_CHAR()
66 static void channel64_write_CHAR(const struct txx9dmac_chan *dc, dma_addr_t val) in channel64_write_CHAR() argument
68 if (sizeof(__dma_regs(dc)->CHAR) == sizeof(u64)) in channel64_write_CHAR()
69 channel64_writeq(dc, CHAR, val); in channel64_write_CHAR()
71 channel64_writel(dc, CHAR, val); in channel64_write_CHAR()
74 static void channel64_clear_CHAR(const struct txx9dmac_chan *dc) in channel64_clear_CHAR() argument
77 channel64_writel(dc, CHAR, 0); in channel64_clear_CHAR()
78 channel64_writel(dc, __pad_CHAR, 0); in channel64_clear_CHAR()
80 channel64_writeq(dc, CHAR, 0); in channel64_clear_CHAR()
84 static dma_addr_t channel_read_CHAR(const struct txx9dmac_chan *dc) in channel_read_CHAR() argument
86 if (is_dmac64(dc)) in channel_read_CHAR()
87 return channel64_read_CHAR(dc); in channel_read_CHAR()
89 return channel32_readl(dc, CHAR); in channel_read_CHAR()
92 static void channel_write_CHAR(const struct txx9dmac_chan *dc, dma_addr_t val) in channel_write_CHAR() argument
94 if (is_dmac64(dc)) in channel_write_CHAR()
95 channel64_write_CHAR(dc, val); in channel_write_CHAR()
97 channel32_writel(dc, CHAR, val); in channel_write_CHAR()
144 static dma_addr_t desc_read_CHAR(const struct txx9dmac_chan *dc, in desc_read_CHAR() argument
147 return is_dmac64(dc) ? desc->hwdesc.CHAR : desc->hwdesc32.CHAR; in desc_read_CHAR()
150 static void desc_write_CHAR(const struct txx9dmac_chan *dc, in desc_write_CHAR() argument
153 if (is_dmac64(dc)) in desc_write_CHAR()
163 static struct txx9dmac_desc *txx9dmac_first_active(struct txx9dmac_chan *dc) in txx9dmac_first_active() argument
165 return list_entry(dc->active_list.next, in txx9dmac_first_active()
169 static struct txx9dmac_desc *txx9dmac_last_active(struct txx9dmac_chan *dc) in txx9dmac_last_active() argument
171 return list_entry(dc->active_list.prev, in txx9dmac_last_active()
175 static struct txx9dmac_desc *txx9dmac_first_queued(struct txx9dmac_chan *dc) in txx9dmac_first_queued() argument
177 return list_entry(dc->queue.next, struct txx9dmac_desc, desc_node); in txx9dmac_first_queued()
189 static struct txx9dmac_desc *txx9dmac_desc_alloc(struct txx9dmac_chan *dc, in txx9dmac_desc_alloc() argument
192 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_desc_alloc()
199 dma_async_tx_descriptor_init(&desc->txd, &dc->chan); in txx9dmac_desc_alloc()
203 desc->txd.phys = dma_map_single(chan2parent(&dc->chan), &desc->hwdesc, in txx9dmac_desc_alloc()
208 static struct txx9dmac_desc *txx9dmac_desc_get(struct txx9dmac_chan *dc) in txx9dmac_desc_get() argument
214 spin_lock_bh(&dc->lock); in txx9dmac_desc_get()
215 list_for_each_entry_safe(desc, _desc, &dc->free_list, desc_node) { in txx9dmac_desc_get()
221 dev_dbg(chan2dev(&dc->chan), "desc %p not ACKed\n", desc); in txx9dmac_desc_get()
224 spin_unlock_bh(&dc->lock); in txx9dmac_desc_get()
226 dev_vdbg(chan2dev(&dc->chan), "scanned %u descriptors on freelist\n", in txx9dmac_desc_get()
229 ret = txx9dmac_desc_alloc(dc, GFP_ATOMIC); in txx9dmac_desc_get()
231 spin_lock_bh(&dc->lock); in txx9dmac_desc_get()
232 dc->descs_allocated++; in txx9dmac_desc_get()
233 spin_unlock_bh(&dc->lock); in txx9dmac_desc_get()
235 dev_err(chan2dev(&dc->chan), in txx9dmac_desc_get()
241 static void txx9dmac_sync_desc_for_cpu(struct txx9dmac_chan *dc, in txx9dmac_sync_desc_for_cpu() argument
244 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_sync_desc_for_cpu()
248 dma_sync_single_for_cpu(chan2parent(&dc->chan), in txx9dmac_sync_desc_for_cpu()
251 dma_sync_single_for_cpu(chan2parent(&dc->chan), in txx9dmac_sync_desc_for_cpu()
260 static void txx9dmac_desc_put(struct txx9dmac_chan *dc, in txx9dmac_desc_put() argument
266 txx9dmac_sync_desc_for_cpu(dc, desc); in txx9dmac_desc_put()
268 spin_lock_bh(&dc->lock); in txx9dmac_desc_put()
270 dev_vdbg(chan2dev(&dc->chan), in txx9dmac_desc_put()
273 list_splice_init(&desc->tx_list, &dc->free_list); in txx9dmac_desc_put()
274 dev_vdbg(chan2dev(&dc->chan), "moving desc %p to freelist\n", in txx9dmac_desc_put()
276 list_add(&desc->desc_node, &dc->free_list); in txx9dmac_desc_put()
277 spin_unlock_bh(&dc->lock); in txx9dmac_desc_put()
283 static void txx9dmac_dump_regs(struct txx9dmac_chan *dc) in txx9dmac_dump_regs() argument
285 if (is_dmac64(dc)) in txx9dmac_dump_regs()
286 dev_err(chan2dev(&dc->chan), in txx9dmac_dump_regs()
289 (u64)channel64_read_CHAR(dc), in txx9dmac_dump_regs()
290 channel64_readq(dc, SAR), in txx9dmac_dump_regs()
291 channel64_readq(dc, DAR), in txx9dmac_dump_regs()
292 channel64_readl(dc, CNTR), in txx9dmac_dump_regs()
293 channel64_readl(dc, SAIR), in txx9dmac_dump_regs()
294 channel64_readl(dc, DAIR), in txx9dmac_dump_regs()
295 channel64_readl(dc, CCR), in txx9dmac_dump_regs()
296 channel64_readl(dc, CSR)); in txx9dmac_dump_regs()
298 dev_err(chan2dev(&dc->chan), in txx9dmac_dump_regs()
301 channel32_readl(dc, CHAR), in txx9dmac_dump_regs()
302 channel32_readl(dc, SAR), in txx9dmac_dump_regs()
303 channel32_readl(dc, DAR), in txx9dmac_dump_regs()
304 channel32_readl(dc, CNTR), in txx9dmac_dump_regs()
305 channel32_readl(dc, SAIR), in txx9dmac_dump_regs()
306 channel32_readl(dc, DAIR), in txx9dmac_dump_regs()
307 channel32_readl(dc, CCR), in txx9dmac_dump_regs()
308 channel32_readl(dc, CSR)); in txx9dmac_dump_regs()
311 static void txx9dmac_reset_chan(struct txx9dmac_chan *dc) in txx9dmac_reset_chan() argument
313 channel_writel(dc, CCR, TXX9_DMA_CCR_CHRST); in txx9dmac_reset_chan()
314 if (is_dmac64(dc)) { in txx9dmac_reset_chan()
315 channel64_clear_CHAR(dc); in txx9dmac_reset_chan()
316 channel_writeq(dc, SAR, 0); in txx9dmac_reset_chan()
317 channel_writeq(dc, DAR, 0); in txx9dmac_reset_chan()
319 channel_writel(dc, CHAR, 0); in txx9dmac_reset_chan()
320 channel_writel(dc, SAR, 0); in txx9dmac_reset_chan()
321 channel_writel(dc, DAR, 0); in txx9dmac_reset_chan()
323 channel_writel(dc, CNTR, 0); in txx9dmac_reset_chan()
324 channel_writel(dc, SAIR, 0); in txx9dmac_reset_chan()
325 channel_writel(dc, DAIR, 0); in txx9dmac_reset_chan()
326 channel_writel(dc, CCR, 0); in txx9dmac_reset_chan()
330 static void txx9dmac_dostart(struct txx9dmac_chan *dc, in txx9dmac_dostart() argument
333 struct txx9dmac_slave *ds = dc->chan.private; in txx9dmac_dostart()
336 dev_vdbg(chan2dev(&dc->chan), "dostart %u %p\n", in txx9dmac_dostart()
339 if (channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT) { in txx9dmac_dostart()
340 dev_err(chan2dev(&dc->chan), in txx9dmac_dostart()
342 txx9dmac_dump_regs(dc); in txx9dmac_dostart()
347 if (is_dmac64(dc)) { in txx9dmac_dostart()
348 channel64_writel(dc, CNTR, 0); in txx9dmac_dostart()
349 channel64_writel(dc, CSR, 0xffffffff); in txx9dmac_dostart()
362 channel64_writel(dc, SAIR, sai); in txx9dmac_dostart()
363 channel64_writel(dc, DAIR, dai); in txx9dmac_dostart()
365 channel64_writel(dc, CCR, dc->ccr); in txx9dmac_dostart()
367 channel64_write_CHAR(dc, first->txd.phys); in txx9dmac_dostart()
369 channel32_writel(dc, CNTR, 0); in txx9dmac_dostart()
370 channel32_writel(dc, CSR, 0xffffffff); in txx9dmac_dostart()
383 channel32_writel(dc, SAIR, sai); in txx9dmac_dostart()
384 channel32_writel(dc, DAIR, dai); in txx9dmac_dostart()
386 channel32_writel(dc, CCR, dc->ccr); in txx9dmac_dostart()
388 channel32_writel(dc, CHAR, first->txd.phys); in txx9dmac_dostart()
390 channel32_writel(dc, CHAR, first->txd.phys); in txx9dmac_dostart()
391 channel32_writel(dc, CCR, dc->ccr); in txx9dmac_dostart()
399 txx9dmac_descriptor_complete(struct txx9dmac_chan *dc, in txx9dmac_descriptor_complete() argument
405 dev_vdbg(chan2dev(&dc->chan), "descriptor %u %p complete\n", in txx9dmac_descriptor_complete()
411 txx9dmac_sync_desc_for_cpu(dc, desc); in txx9dmac_descriptor_complete()
412 list_splice_init(&desc->tx_list, &dc->free_list); in txx9dmac_descriptor_complete()
413 list_move(&desc->desc_node, &dc->free_list); in txx9dmac_descriptor_complete()
424 static void txx9dmac_dequeue(struct txx9dmac_chan *dc, struct list_head *list) in txx9dmac_dequeue() argument
426 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_dequeue()
432 desc = txx9dmac_first_queued(dc); in txx9dmac_dequeue()
434 desc_write_CHAR(dc, prev, desc->txd.phys); in txx9dmac_dequeue()
435 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_dequeue()
443 !txx9dmac_chan_INTENT(dc)) in txx9dmac_dequeue()
445 } while (!list_empty(&dc->queue)); in txx9dmac_dequeue()
448 static void txx9dmac_complete_all(struct txx9dmac_chan *dc) in txx9dmac_complete_all() argument
457 list_splice_init(&dc->active_list, &list); in txx9dmac_complete_all()
458 if (!list_empty(&dc->queue)) { in txx9dmac_complete_all()
459 txx9dmac_dequeue(dc, &dc->active_list); in txx9dmac_complete_all()
460 txx9dmac_dostart(dc, txx9dmac_first_active(dc)); in txx9dmac_complete_all()
464 txx9dmac_descriptor_complete(dc, desc); in txx9dmac_complete_all()
467 static void txx9dmac_dump_desc(struct txx9dmac_chan *dc, in txx9dmac_dump_desc() argument
470 if (is_dmac64(dc)) { in txx9dmac_dump_desc()
472 dev_crit(chan2dev(&dc->chan), in txx9dmac_dump_desc()
476 dev_crit(chan2dev(&dc->chan), in txx9dmac_dump_desc()
485 dev_crit(chan2dev(&dc->chan), in txx9dmac_dump_desc()
489 dev_crit(chan2dev(&dc->chan), in txx9dmac_dump_desc()
498 static void txx9dmac_handle_error(struct txx9dmac_chan *dc, u32 csr) in txx9dmac_handle_error() argument
509 dev_crit(chan2dev(&dc->chan), "Abnormal Chain Completion\n"); in txx9dmac_handle_error()
510 txx9dmac_dump_regs(dc); in txx9dmac_handle_error()
512 bad_desc = txx9dmac_first_active(dc); in txx9dmac_handle_error()
519 channel_writel(dc, CSR, errors); in txx9dmac_handle_error()
521 if (list_empty(&dc->active_list) && !list_empty(&dc->queue)) in txx9dmac_handle_error()
522 txx9dmac_dequeue(dc, &dc->active_list); in txx9dmac_handle_error()
523 if (!list_empty(&dc->active_list)) in txx9dmac_handle_error()
524 txx9dmac_dostart(dc, txx9dmac_first_active(dc)); in txx9dmac_handle_error()
526 dev_crit(chan2dev(&dc->chan), in txx9dmac_handle_error()
529 txx9dmac_dump_desc(dc, &bad_desc->hwdesc); in txx9dmac_handle_error()
531 txx9dmac_dump_desc(dc, &child->hwdesc); in txx9dmac_handle_error()
533 txx9dmac_descriptor_complete(dc, bad_desc); in txx9dmac_handle_error()
536 static void txx9dmac_scan_descriptors(struct txx9dmac_chan *dc) in txx9dmac_scan_descriptors() argument
543 if (is_dmac64(dc)) { in txx9dmac_scan_descriptors()
544 chain = channel64_read_CHAR(dc); in txx9dmac_scan_descriptors()
545 csr = channel64_readl(dc, CSR); in txx9dmac_scan_descriptors()
546 channel64_writel(dc, CSR, csr); in txx9dmac_scan_descriptors()
548 chain = channel32_readl(dc, CHAR); in txx9dmac_scan_descriptors()
549 csr = channel32_readl(dc, CSR); in txx9dmac_scan_descriptors()
550 channel32_writel(dc, CSR, csr); in txx9dmac_scan_descriptors()
555 txx9dmac_complete_all(dc); in txx9dmac_scan_descriptors()
561 dev_vdbg(chan2dev(&dc->chan), "scan_descriptors: char=%#llx\n", in txx9dmac_scan_descriptors()
564 list_for_each_entry_safe(desc, _desc, &dc->active_list, desc_node) { in txx9dmac_scan_descriptors()
565 if (desc_read_CHAR(dc, desc) == chain) { in txx9dmac_scan_descriptors()
573 if (desc_read_CHAR(dc, child) == chain) { in txx9dmac_scan_descriptors()
584 txx9dmac_descriptor_complete(dc, desc); in txx9dmac_scan_descriptors()
588 txx9dmac_handle_error(dc, csr); in txx9dmac_scan_descriptors()
592 dev_err(chan2dev(&dc->chan), in txx9dmac_scan_descriptors()
596 txx9dmac_reset_chan(dc); in txx9dmac_scan_descriptors()
598 if (!list_empty(&dc->queue)) { in txx9dmac_scan_descriptors()
599 txx9dmac_dequeue(dc, &dc->active_list); in txx9dmac_scan_descriptors()
600 txx9dmac_dostart(dc, txx9dmac_first_active(dc)); in txx9dmac_scan_descriptors()
608 struct txx9dmac_chan *dc; in txx9dmac_chan_tasklet() local
610 dc = from_tasklet(dc, t, tasklet); in txx9dmac_chan_tasklet()
611 csr = channel_readl(dc, CSR); in txx9dmac_chan_tasklet()
612 dev_vdbg(chan2dev(&dc->chan), "tasklet: status=%x\n", csr); in txx9dmac_chan_tasklet()
614 spin_lock(&dc->lock); in txx9dmac_chan_tasklet()
617 txx9dmac_scan_descriptors(dc); in txx9dmac_chan_tasklet()
618 spin_unlock(&dc->lock); in txx9dmac_chan_tasklet()
619 irq = dc->irq; in txx9dmac_chan_tasklet()
626 struct txx9dmac_chan *dc = dev_id; in txx9dmac_chan_interrupt() local
628 dev_vdbg(chan2dev(&dc->chan), "interrupt: status=%#x\n", in txx9dmac_chan_interrupt()
629 channel_readl(dc, CSR)); in txx9dmac_chan_interrupt()
631 tasklet_schedule(&dc->tasklet); in txx9dmac_chan_interrupt()
645 struct txx9dmac_chan *dc; in txx9dmac_tasklet() local
655 dc = ddev->chan[i]; in txx9dmac_tasklet()
656 csr = channel_readl(dc, CSR); in txx9dmac_tasklet()
657 dev_vdbg(chan2dev(&dc->chan), "tasklet: status=%x\n", in txx9dmac_tasklet()
659 spin_lock(&dc->lock); in txx9dmac_tasklet()
662 txx9dmac_scan_descriptors(dc); in txx9dmac_tasklet()
663 spin_unlock(&dc->lock); in txx9dmac_tasklet()
693 struct txx9dmac_chan *dc = to_txx9dmac_chan(tx->chan); in txx9dmac_tx_submit() local
696 spin_lock_bh(&dc->lock); in txx9dmac_tx_submit()
702 list_add_tail(&desc->desc_node, &dc->queue); in txx9dmac_tx_submit()
703 spin_unlock_bh(&dc->lock); in txx9dmac_tx_submit()
712 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_prep_dma_memcpy() local
713 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_prep_dma_memcpy()
748 desc = txx9dmac_desc_get(dc); in txx9dmac_prep_dma_memcpy()
750 txx9dmac_desc_put(dc, first); in txx9dmac_prep_dma_memcpy()
759 dc->ccr | TXX9_DMA_CCR_XFACT); in txx9dmac_prep_dma_memcpy()
765 dc->ccr | TXX9_DMA_CCR_XFACT); in txx9dmac_prep_dma_memcpy()
778 desc_write_CHAR(dc, prev, desc->txd.phys); in txx9dmac_prep_dma_memcpy()
779 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_prep_dma_memcpy()
791 desc_write_CHAR(dc, prev, 0); in txx9dmac_prep_dma_memcpy()
792 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_prep_dma_memcpy()
807 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_prep_slave_sg() local
808 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_prep_slave_sg()
832 desc = txx9dmac_desc_get(dc); in txx9dmac_prep_slave_sg()
834 txx9dmac_desc_put(dc, first); in txx9dmac_prep_slave_sg()
867 dc->ccr | TXX9_DMA_CCR_XFACT); in txx9dmac_prep_slave_sg()
872 desc_write_CHAR(dc, prev, desc->txd.phys); in txx9dmac_prep_slave_sg()
873 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_prep_slave_sg()
886 desc_write_CHAR(dc, prev, 0); in txx9dmac_prep_slave_sg()
887 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_prep_slave_sg()
899 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_terminate_all() local
904 spin_lock_bh(&dc->lock); in txx9dmac_terminate_all()
906 txx9dmac_reset_chan(dc); in txx9dmac_terminate_all()
909 list_splice_init(&dc->queue, &list); in txx9dmac_terminate_all()
910 list_splice_init(&dc->active_list, &list); in txx9dmac_terminate_all()
912 spin_unlock_bh(&dc->lock); in txx9dmac_terminate_all()
916 txx9dmac_descriptor_complete(dc, desc); in txx9dmac_terminate_all()
925 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_tx_status() local
932 spin_lock_bh(&dc->lock); in txx9dmac_tx_status()
933 txx9dmac_scan_descriptors(dc); in txx9dmac_tx_status()
934 spin_unlock_bh(&dc->lock); in txx9dmac_tx_status()
939 static void txx9dmac_chain_dynamic(struct txx9dmac_chan *dc, in txx9dmac_chain_dynamic() argument
942 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_chain_dynamic()
947 txx9dmac_dequeue(dc, &list); in txx9dmac_chain_dynamic()
949 desc_write_CHAR(dc, prev, desc->txd.phys); in txx9dmac_chain_dynamic()
950 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_chain_dynamic()
953 if (!(channel_readl(dc, CSR) & TXX9_DMA_CSR_CHNEN) && in txx9dmac_chain_dynamic()
954 channel_read_CHAR(dc) == prev->txd.phys) in txx9dmac_chain_dynamic()
956 channel_write_CHAR(dc, desc->txd.phys); in txx9dmac_chain_dynamic()
957 list_splice_tail(&list, &dc->active_list); in txx9dmac_chain_dynamic()
962 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_issue_pending() local
964 spin_lock_bh(&dc->lock); in txx9dmac_issue_pending()
966 if (!list_empty(&dc->active_list)) in txx9dmac_issue_pending()
967 txx9dmac_scan_descriptors(dc); in txx9dmac_issue_pending()
968 if (!list_empty(&dc->queue)) { in txx9dmac_issue_pending()
969 if (list_empty(&dc->active_list)) { in txx9dmac_issue_pending()
970 txx9dmac_dequeue(dc, &dc->active_list); in txx9dmac_issue_pending()
971 txx9dmac_dostart(dc, txx9dmac_first_active(dc)); in txx9dmac_issue_pending()
973 struct txx9dmac_desc *prev = txx9dmac_last_active(dc); in txx9dmac_issue_pending()
976 txx9dmac_chan_INTENT(dc)) in txx9dmac_issue_pending()
977 txx9dmac_chain_dynamic(dc, prev); in txx9dmac_issue_pending()
981 spin_unlock_bh(&dc->lock); in txx9dmac_issue_pending()
986 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_alloc_chan_resources() local
994 if (channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT) { in txx9dmac_alloc_chan_resources()
1001 dc->ccr = TXX9_DMA_CCR_IMMCHN | TXX9_DMA_CCR_INTENE | CCR_LE; in txx9dmac_alloc_chan_resources()
1002 txx9dmac_chan_set_SMPCHN(dc); in txx9dmac_alloc_chan_resources()
1003 if (!txx9_dma_have_SMPCHN() || (dc->ccr & TXX9_DMA_CCR_SMPCHN)) in txx9dmac_alloc_chan_resources()
1004 dc->ccr |= TXX9_DMA_CCR_INTENC; in txx9dmac_alloc_chan_resources()
1008 dc->ccr |= TXX9_DMA_CCR_XFSZ_X8; in txx9dmac_alloc_chan_resources()
1013 dc->ccr |= TXX9_DMA_CCR_EXTRQ | in txx9dmac_alloc_chan_resources()
1015 txx9dmac_chan_set_INTENT(dc); in txx9dmac_alloc_chan_resources()
1018 spin_lock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1019 i = dc->descs_allocated; in txx9dmac_alloc_chan_resources()
1020 while (dc->descs_allocated < TXX9_DMA_INITIAL_DESC_COUNT) { in txx9dmac_alloc_chan_resources()
1021 spin_unlock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1023 desc = txx9dmac_desc_alloc(dc, GFP_KERNEL); in txx9dmac_alloc_chan_resources()
1027 spin_lock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1030 txx9dmac_desc_put(dc, desc); in txx9dmac_alloc_chan_resources()
1032 spin_lock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1033 i = ++dc->descs_allocated; in txx9dmac_alloc_chan_resources()
1035 spin_unlock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1045 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_free_chan_resources() local
1046 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_free_chan_resources()
1051 dc->descs_allocated); in txx9dmac_free_chan_resources()
1054 BUG_ON(!list_empty(&dc->active_list)); in txx9dmac_free_chan_resources()
1055 BUG_ON(!list_empty(&dc->queue)); in txx9dmac_free_chan_resources()
1056 BUG_ON(channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT); in txx9dmac_free_chan_resources()
1058 spin_lock_bh(&dc->lock); in txx9dmac_free_chan_resources()
1059 list_splice_init(&dc->free_list, &list); in txx9dmac_free_chan_resources()
1060 dc->descs_allocated = 0; in txx9dmac_free_chan_resources()
1061 spin_unlock_bh(&dc->lock); in txx9dmac_free_chan_resources()
1086 struct txx9dmac_chan *dc; in txx9dmac_chan_probe() local
1091 dc = devm_kzalloc(&pdev->dev, sizeof(*dc), GFP_KERNEL); in txx9dmac_chan_probe()
1092 if (!dc) in txx9dmac_chan_probe()
1095 dc->dma.dev = &pdev->dev; in txx9dmac_chan_probe()
1096 dc->dma.device_alloc_chan_resources = txx9dmac_alloc_chan_resources; in txx9dmac_chan_probe()
1097 dc->dma.device_free_chan_resources = txx9dmac_free_chan_resources; in txx9dmac_chan_probe()
1098 dc->dma.device_terminate_all = txx9dmac_terminate_all; in txx9dmac_chan_probe()
1099 dc->dma.device_tx_status = txx9dmac_tx_status; in txx9dmac_chan_probe()
1100 dc->dma.device_issue_pending = txx9dmac_issue_pending; in txx9dmac_chan_probe()
1102 dc->dma.device_prep_dma_memcpy = txx9dmac_prep_dma_memcpy; in txx9dmac_chan_probe()
1103 dma_cap_set(DMA_MEMCPY, dc->dma.cap_mask); in txx9dmac_chan_probe()
1105 dc->dma.device_prep_slave_sg = txx9dmac_prep_slave_sg; in txx9dmac_chan_probe()
1106 dma_cap_set(DMA_SLAVE, dc->dma.cap_mask); in txx9dmac_chan_probe()
1107 dma_cap_set(DMA_PRIVATE, dc->dma.cap_mask); in txx9dmac_chan_probe()
1110 INIT_LIST_HEAD(&dc->dma.channels); in txx9dmac_chan_probe()
1111 dc->ddev = platform_get_drvdata(dmac_dev); in txx9dmac_chan_probe()
1112 if (dc->ddev->irq < 0) { in txx9dmac_chan_probe()
1116 tasklet_setup(&dc->tasklet, txx9dmac_chan_tasklet); in txx9dmac_chan_probe()
1117 dc->irq = irq; in txx9dmac_chan_probe()
1118 err = devm_request_irq(&pdev->dev, dc->irq, in txx9dmac_chan_probe()
1119 txx9dmac_chan_interrupt, 0, dev_name(&pdev->dev), dc); in txx9dmac_chan_probe()
1123 dc->irq = -1; in txx9dmac_chan_probe()
1124 dc->ddev->chan[ch] = dc; in txx9dmac_chan_probe()
1125 dc->chan.device = &dc->dma; in txx9dmac_chan_probe()
1126 list_add_tail(&dc->chan.device_node, &dc->chan.device->channels); in txx9dmac_chan_probe()
1127 dma_cookie_init(&dc->chan); in txx9dmac_chan_probe()
1129 if (is_dmac64(dc)) in txx9dmac_chan_probe()
1130 dc->ch_regs = &__txx9dmac_regs(dc->ddev)->CHAN[ch]; in txx9dmac_chan_probe()
1132 dc->ch_regs = &__txx9dmac_regs32(dc->ddev)->CHAN[ch]; in txx9dmac_chan_probe()
1133 spin_lock_init(&dc->lock); in txx9dmac_chan_probe()
1135 INIT_LIST_HEAD(&dc->active_list); in txx9dmac_chan_probe()
1136 INIT_LIST_HEAD(&dc->queue); in txx9dmac_chan_probe()
1137 INIT_LIST_HEAD(&dc->free_list); in txx9dmac_chan_probe()
1139 txx9dmac_reset_chan(dc); in txx9dmac_chan_probe()
1141 platform_set_drvdata(pdev, dc); in txx9dmac_chan_probe()
1143 err = dma_async_device_register(&dc->dma); in txx9dmac_chan_probe()
1147 dc->dma.dev_id, in txx9dmac_chan_probe()
1148 dma_has_cap(DMA_MEMCPY, dc->dma.cap_mask) ? " memcpy" : "", in txx9dmac_chan_probe()
1149 dma_has_cap(DMA_SLAVE, dc->dma.cap_mask) ? " slave" : ""); in txx9dmac_chan_probe()
1156 struct txx9dmac_chan *dc = platform_get_drvdata(pdev); in txx9dmac_chan_remove() local
1159 dma_async_device_unregister(&dc->dma); in txx9dmac_chan_remove()
1160 if (dc->irq >= 0) { in txx9dmac_chan_remove()
1161 devm_free_irq(&pdev->dev, dc->irq, dc); in txx9dmac_chan_remove()
1162 tasklet_kill(&dc->tasklet); in txx9dmac_chan_remove()
1164 dc->ddev->chan[pdev->id % TXX9_DMA_MAX_NR_CHANNELS] = NULL; in txx9dmac_chan_remove()