178 static inline void tdma_ch_write(struct tegra_adma_chan *tdc, u32 reg, u32 val)  in tdma_ch_write()  function
323 		tdma_ch_write(tdc, ADMA_CH_INT_CLEAR, status);  in tegra_adma_irq_clear()
333 	tdma_ch_write(tdc, ADMA_CH_CMD, 0);  in tegra_adma_stop()
371 	tdma_ch_write(tdc, ADMA_CH_TC, ch_regs->tc);  in tegra_adma_start()
372 	tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl);  in tegra_adma_start()
373 	tdma_ch_write(tdc, ADMA_CH_LOWER_SRC_ADDR, ch_regs->src_addr);  in tegra_adma_start()
374 	tdma_ch_write(tdc, ADMA_CH_LOWER_TRG_ADDR, ch_regs->trg_addr);  in tegra_adma_start()
375 	tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_regs->fifo_ctrl);  in tegra_adma_start()
376 	tdma_ch_write(tdc, ADMA_CH_CONFIG, ch_regs->config);  in tegra_adma_start()
379 	tdma_ch_write(tdc, ADMA_CH_CMD, 1);  in tegra_adma_start()
459 	tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl);  in tegra_adma_pause()
480 	tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl);  in tegra_adma_resume()
786 		tdma_ch_write(tdc, ADMA_CH_TC, ch_reg->tc);  in tegra_adma_runtime_resume()
787 		tdma_ch_write(tdc, ADMA_CH_LOWER_SRC_ADDR, ch_reg->src_addr);  in tegra_adma_runtime_resume()
788 		tdma_ch_write(tdc, ADMA_CH_LOWER_TRG_ADDR, ch_reg->trg_addr);  in tegra_adma_runtime_resume()
789 		tdma_ch_write(tdc, ADMA_CH_CTRL, ch_reg->ctrl);  in tegra_adma_runtime_resume()
790 		tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_reg->fifo_ctrl);  in tegra_adma_runtime_resume()
791 		tdma_ch_write(tdc, ADMA_CH_CONFIG, ch_reg->config);  in tegra_adma_runtime_resume()
792 		tdma_ch_write(tdc, ADMA_CH_CMD, ch_reg->cmd);  in tegra_adma_runtime_resume()