260 static inline void tdc_write(struct tegra_dma_channel *tdc,  in tdc_write()  function
381 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSRE, val);  in tegra_dma_pause()
421 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSRE, val);  in tegra_dma_resume()
461 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, csr);  in tegra_dma_disable()
467 		tdc_write(tdc, TEGRA_GPCDMA_CHAN_STATUS, status);  in tegra_dma_disable()
495 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_WCOUNT, ch_regs->wcount);  in tegra_dma_configure_next_sg()
496 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_SRC_PTR, ch_regs->src_ptr);  in tegra_dma_configure_next_sg()
497 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_DST_PTR, ch_regs->dst_ptr);  in tegra_dma_configure_next_sg()
498 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_HIGH_ADDR_PTR, ch_regs->high_addr_ptr);  in tegra_dma_configure_next_sg()
501 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR,  in tegra_dma_configure_next_sg()
526 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_WCOUNT, ch_regs->wcount);  in tegra_dma_start()
527 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, 0);  in tegra_dma_start()
528 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_SRC_PTR, ch_regs->src_ptr);  in tegra_dma_start()
529 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_DST_PTR, ch_regs->dst_ptr);  in tegra_dma_start()
530 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_HIGH_ADDR_PTR, ch_regs->high_addr_ptr);  in tegra_dma_start()
531 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_FIXED_PATTERN, ch_regs->fixed_pattern);  in tegra_dma_start()
532 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_MMIOSEQ, ch_regs->mmio_seq);  in tegra_dma_start()
533 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_MCSEQ, ch_regs->mc_seq);  in tegra_dma_start()
534 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, ch_regs->csr);  in tegra_dma_start()
537 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR,  in tegra_dma_start()
602 		tdc_write(tdc, TEGRA_GPCDMA_CHAN_ERR_STATUS, 0xFFFFFFFF);  in tegra_dma_isr()
610 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_STATUS,  in tegra_dma_isr()
673 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, csr);  in tegra_dma_stop_client()
1347 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_MCSEQ, reg_val);  in tegra_dma_program_sid()