Lines Matching +full:sun50i +full:- +full:a64 +full:- +full:mbus
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2013-2014 Allwinner Tech Co., Ltd
7 * Maxime Ripard <maxime.ripard@free-electrons.com>
12 #include <linux/dma-mapping.h>
24 #include "virt-dma.h"
217 return &chan->dev->device; in chan2dev()
238 dev_dbg(sdev->slave.dev, "Common register:\n" in sun6i_dma_dump_com_regs()
244 DMA_IRQ_EN(0), readl(sdev->base + DMA_IRQ_EN(0)), in sun6i_dma_dump_com_regs()
245 DMA_IRQ_EN(1), readl(sdev->base + DMA_IRQ_EN(1)), in sun6i_dma_dump_com_regs()
246 DMA_IRQ_STAT(0), readl(sdev->base + DMA_IRQ_STAT(0)), in sun6i_dma_dump_com_regs()
247 DMA_IRQ_STAT(1), readl(sdev->base + DMA_IRQ_STAT(1)), in sun6i_dma_dump_com_regs()
248 DMA_STAT, readl(sdev->base + DMA_STAT)); in sun6i_dma_dump_com_regs()
254 dev_dbg(sdev->slave.dev, "Chan %d reg:\n" in sun6i_dma_dump_chan_regs()
263 pchan->idx, in sun6i_dma_dump_chan_regs()
265 readl(pchan->base + DMA_CHAN_ENABLE), in sun6i_dma_dump_chan_regs()
267 readl(pchan->base + DMA_CHAN_PAUSE), in sun6i_dma_dump_chan_regs()
269 readl(pchan->base + DMA_CHAN_LLI_ADDR), in sun6i_dma_dump_chan_regs()
271 readl(pchan->base + DMA_CHAN_CUR_CFG), in sun6i_dma_dump_chan_regs()
273 readl(pchan->base + DMA_CHAN_CUR_SRC), in sun6i_dma_dump_chan_regs()
275 readl(pchan->base + DMA_CHAN_CUR_DST), in sun6i_dma_dump_chan_regs()
277 readl(pchan->base + DMA_CHAN_CUR_CNT), in sun6i_dma_dump_chan_regs()
279 readl(pchan->base + DMA_CHAN_CUR_PARA)); in sun6i_dma_dump_chan_regs()
294 return -EINVAL; in convert_burst()
305 writel(SUN8I_DMA_GATE_ENABLE, sdev->base + SUN8I_DMA_GATE); in sun6i_enable_clock_autogate_a23()
310 writel(SUNXI_H3_DMA_GATE_ENABLE, sdev->base + SUNXI_H3_DMA_GATE); in sun6i_enable_clock_autogate_h3()
351 struct sun6i_desc *txd = pchan->desc; in sun6i_get_chan_size()
356 pos = readl(pchan->base + DMA_CHAN_LLI_ADDR); in sun6i_get_chan_size()
357 bytes = readl(pchan->base + DMA_CHAN_CUR_CNT); in sun6i_get_chan_size()
362 for (lli = txd->v_lli; lli; lli = lli->v_lli_next) { in sun6i_get_chan_size()
363 if (lli->p_lli_next == pos) { in sun6i_get_chan_size()
364 for (lli = lli->v_lli_next; lli; lli = lli->v_lli_next) in sun6i_get_chan_size()
365 bytes += lli->len; in sun6i_get_chan_size()
382 txd->p_lli = next_phy; in sun6i_dma_lli_add()
383 txd->v_lli = next; in sun6i_dma_lli_add()
385 prev->p_lli_next = next_phy; in sun6i_dma_lli_add()
386 prev->v_lli_next = next; in sun6i_dma_lli_add()
389 next->p_lli_next = LLI_LAST_ITEM; in sun6i_dma_lli_add()
390 next->v_lli_next = NULL; in sun6i_dma_lli_add()
399 dev_dbg(chan2dev(&vchan->vc.chan), in sun6i_dma_dump_lli()
400 "\n\tdesc:\tp - %pad v - 0x%p\n" in sun6i_dma_dump_lli()
401 "\t\tc - 0x%08x s - 0x%08x d - 0x%08x\n" in sun6i_dma_dump_lli()
402 "\t\tl - 0x%08x p - 0x%08x n - 0x%08x\n", in sun6i_dma_dump_lli()
404 v_lli->cfg, v_lli->src, v_lli->dst, in sun6i_dma_dump_lli()
405 v_lli->len, v_lli->para, v_lli->p_lli_next); in sun6i_dma_dump_lli()
410 struct sun6i_desc *txd = to_sun6i_desc(&vd->tx); in sun6i_dma_free_desc()
411 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(vd->tx.chan->device); in sun6i_dma_free_desc()
418 p_lli = txd->p_lli; in sun6i_dma_free_desc()
419 v_lli = txd->v_lli; in sun6i_dma_free_desc()
422 v_next = v_lli->v_lli_next; in sun6i_dma_free_desc()
423 p_next = v_lli->p_lli_next; in sun6i_dma_free_desc()
425 dma_pool_free(sdev->pool, v_lli, p_lli); in sun6i_dma_free_desc()
436 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(vchan->vc.chan.device); in sun6i_dma_start_desc()
437 struct virt_dma_desc *desc = vchan_next_desc(&vchan->vc); in sun6i_dma_start_desc()
438 struct sun6i_pchan *pchan = vchan->phy; in sun6i_dma_start_desc()
442 return -EAGAIN; in sun6i_dma_start_desc()
445 pchan->desc = NULL; in sun6i_dma_start_desc()
446 pchan->done = NULL; in sun6i_dma_start_desc()
447 return -EAGAIN; in sun6i_dma_start_desc()
450 list_del(&desc->node); in sun6i_dma_start_desc()
452 pchan->desc = to_sun6i_desc(&desc->tx); in sun6i_dma_start_desc()
453 pchan->done = NULL; in sun6i_dma_start_desc()
455 sun6i_dma_dump_lli(vchan, pchan->desc->v_lli, pchan->desc->p_lli); in sun6i_dma_start_desc()
457 irq_reg = pchan->idx / DMA_IRQ_CHAN_NR; in sun6i_dma_start_desc()
458 irq_offset = pchan->idx % DMA_IRQ_CHAN_NR; in sun6i_dma_start_desc()
460 vchan->irq_type = vchan->cyclic ? DMA_IRQ_PKG : DMA_IRQ_QUEUE; in sun6i_dma_start_desc()
462 irq_val = readl(sdev->base + DMA_IRQ_EN(irq_reg)); in sun6i_dma_start_desc()
465 irq_val |= vchan->irq_type << (irq_offset * DMA_IRQ_CHAN_WIDTH); in sun6i_dma_start_desc()
466 writel(irq_val, sdev->base + DMA_IRQ_EN(irq_reg)); in sun6i_dma_start_desc()
468 writel(pchan->desc->p_lli, pchan->base + DMA_CHAN_LLI_ADDR); in sun6i_dma_start_desc()
469 writel(DMA_CHAN_ENABLE_START, pchan->base + DMA_CHAN_ENABLE); in sun6i_dma_start_desc()
485 list_for_each_entry(vchan, &sdev->slave.channels, vc.chan.device_node) { in sun6i_dma_tasklet()
486 spin_lock_irq(&vchan->vc.lock); in sun6i_dma_tasklet()
488 pchan = vchan->phy; in sun6i_dma_tasklet()
490 if (pchan && pchan->done) { in sun6i_dma_tasklet()
495 dev_dbg(sdev->slave.dev, "pchan %u: free\n", in sun6i_dma_tasklet()
496 pchan->idx); in sun6i_dma_tasklet()
499 vchan->phy = NULL; in sun6i_dma_tasklet()
500 pchan->vchan = NULL; in sun6i_dma_tasklet()
503 spin_unlock_irq(&vchan->vc.lock); in sun6i_dma_tasklet()
506 spin_lock_irq(&sdev->lock); in sun6i_dma_tasklet()
507 for (pchan_idx = 0; pchan_idx < sdev->num_pchans; pchan_idx++) { in sun6i_dma_tasklet()
508 pchan = &sdev->pchans[pchan_idx]; in sun6i_dma_tasklet()
510 if (pchan->vchan || list_empty(&sdev->pending)) in sun6i_dma_tasklet()
513 vchan = list_first_entry(&sdev->pending, in sun6i_dma_tasklet()
517 list_del_init(&vchan->node); in sun6i_dma_tasklet()
521 pchan->vchan = vchan; in sun6i_dma_tasklet()
522 vchan->phy = pchan; in sun6i_dma_tasklet()
523 dev_dbg(sdev->slave.dev, "pchan %u: alloc vchan %p\n", in sun6i_dma_tasklet()
524 pchan->idx, &vchan->vc); in sun6i_dma_tasklet()
526 spin_unlock_irq(&sdev->lock); in sun6i_dma_tasklet()
528 for (pchan_idx = 0; pchan_idx < sdev->num_pchans; pchan_idx++) { in sun6i_dma_tasklet()
532 pchan = sdev->pchans + pchan_idx; in sun6i_dma_tasklet()
533 vchan = pchan->vchan; in sun6i_dma_tasklet()
535 spin_lock_irq(&vchan->vc.lock); in sun6i_dma_tasklet()
537 spin_unlock_irq(&vchan->vc.lock); in sun6i_dma_tasklet()
550 for (i = 0; i < sdev->num_pchans / DMA_IRQ_CHAN_NR; i++) { in sun6i_dma_interrupt()
551 status = readl(sdev->base + DMA_IRQ_STAT(i)); in sun6i_dma_interrupt()
555 dev_dbg(sdev->slave.dev, "DMA irq status %s: 0x%x\n", in sun6i_dma_interrupt()
558 writel(status, sdev->base + DMA_IRQ_STAT(i)); in sun6i_dma_interrupt()
561 pchan = sdev->pchans + j; in sun6i_dma_interrupt()
562 vchan = pchan->vchan; in sun6i_dma_interrupt()
563 if (vchan && (status & vchan->irq_type)) { in sun6i_dma_interrupt()
564 if (vchan->cyclic) { in sun6i_dma_interrupt()
565 vchan_cyclic_callback(&pchan->desc->vd); in sun6i_dma_interrupt()
567 spin_lock(&vchan->vc.lock); in sun6i_dma_interrupt()
568 vchan_cookie_complete(&pchan->desc->vd); in sun6i_dma_interrupt()
569 pchan->done = pchan->desc; in sun6i_dma_interrupt()
570 spin_unlock(&vchan->vc.lock); in sun6i_dma_interrupt()
577 if (!atomic_read(&sdev->tasklet_shutdown)) in sun6i_dma_interrupt()
578 tasklet_schedule(&sdev->task); in sun6i_dma_interrupt()
594 src_addr_width = sconfig->src_addr_width; in set_config()
595 dst_addr_width = sconfig->dst_addr_width; in set_config()
596 src_maxburst = sconfig->src_maxburst; in set_config()
597 dst_maxburst = sconfig->dst_maxburst; in set_config()
611 return -EINVAL; in set_config()
614 if (!(BIT(src_addr_width) & sdev->slave.src_addr_widths)) in set_config()
615 return -EINVAL; in set_config()
616 if (!(BIT(dst_addr_width) & sdev->slave.dst_addr_widths)) in set_config()
617 return -EINVAL; in set_config()
618 if (!(BIT(src_maxburst) & sdev->cfg->src_burst_lengths)) in set_config()
619 return -EINVAL; in set_config()
620 if (!(BIT(dst_maxburst) & sdev->cfg->dst_burst_lengths)) in set_config()
621 return -EINVAL; in set_config()
631 sdev->cfg->set_burst_length(p_cfg, src_burst, dst_burst); in set_config()
640 v_lli->src = lower_32_bits(src); in sun6i_dma_set_addr()
641 v_lli->dst = lower_32_bits(dst); in sun6i_dma_set_addr()
643 if (sdev->cfg->has_high_addr) in sun6i_dma_set_addr()
644 v_lli->para |= SRC_HIGH_ADDR(upper_32_bits(src)) | in sun6i_dma_set_addr()
652 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); in sun6i_dma_prep_dma_memcpy()
661 __func__, vchan->vc.chan.chan_id, &dest, &src, len, flags); in sun6i_dma_prep_dma_memcpy()
670 v_lli = dma_pool_alloc(sdev->pool, GFP_DMA32 | GFP_NOWAIT, &p_lli); in sun6i_dma_prep_dma_memcpy()
672 dev_err(sdev->slave.dev, "Failed to alloc lli memory\n"); in sun6i_dma_prep_dma_memcpy()
676 v_lli->len = len; in sun6i_dma_prep_dma_memcpy()
677 v_lli->para = NORMAL_WAIT; in sun6i_dma_prep_dma_memcpy()
682 v_lli->cfg = DMA_CHAN_CFG_SRC_WIDTH(width) | in sun6i_dma_prep_dma_memcpy()
685 sdev->cfg->set_burst_length(&v_lli->cfg, burst, burst); in sun6i_dma_prep_dma_memcpy()
686 sdev->cfg->set_drq(&v_lli->cfg, DRQ_SDRAM, DRQ_SDRAM); in sun6i_dma_prep_dma_memcpy()
687 sdev->cfg->set_mode(&v_lli->cfg, LINEAR_MODE, LINEAR_MODE); in sun6i_dma_prep_dma_memcpy()
693 return vchan_tx_prep(&vchan->vc, &txd->vd, flags); in sun6i_dma_prep_dma_memcpy()
705 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); in sun6i_dma_prep_slave_sg()
707 struct dma_slave_config *sconfig = &vchan->cfg; in sun6i_dma_prep_slave_sg()
729 v_lli = dma_pool_alloc(sdev->pool, GFP_DMA32 | GFP_NOWAIT, &p_lli); in sun6i_dma_prep_slave_sg()
733 v_lli->len = sg_dma_len(sg); in sun6i_dma_prep_slave_sg()
734 v_lli->para = NORMAL_WAIT; in sun6i_dma_prep_slave_sg()
739 sconfig->dst_addr); in sun6i_dma_prep_slave_sg()
740 v_lli->cfg = lli_cfg; in sun6i_dma_prep_slave_sg()
741 sdev->cfg->set_drq(&v_lli->cfg, DRQ_SDRAM, vchan->port); in sun6i_dma_prep_slave_sg()
742 sdev->cfg->set_mode(&v_lli->cfg, LINEAR_MODE, IO_MODE); in sun6i_dma_prep_slave_sg()
746 __func__, vchan->vc.chan.chan_id, in sun6i_dma_prep_slave_sg()
747 &sconfig->dst_addr, &sg_dma_address(sg), in sun6i_dma_prep_slave_sg()
752 sconfig->src_addr, in sun6i_dma_prep_slave_sg()
754 v_lli->cfg = lli_cfg; in sun6i_dma_prep_slave_sg()
755 sdev->cfg->set_drq(&v_lli->cfg, vchan->port, DRQ_SDRAM); in sun6i_dma_prep_slave_sg()
756 sdev->cfg->set_mode(&v_lli->cfg, IO_MODE, LINEAR_MODE); in sun6i_dma_prep_slave_sg()
760 __func__, vchan->vc.chan.chan_id, in sun6i_dma_prep_slave_sg()
761 &sg_dma_address(sg), &sconfig->src_addr, in sun6i_dma_prep_slave_sg()
768 dev_dbg(chan2dev(chan), "First: %pad\n", &txd->p_lli); in sun6i_dma_prep_slave_sg()
769 for (p_lli = txd->p_lli, v_lli = txd->v_lli; v_lli; in sun6i_dma_prep_slave_sg()
770 p_lli = v_lli->p_lli_next, v_lli = v_lli->v_lli_next) in sun6i_dma_prep_slave_sg()
773 return vchan_tx_prep(&vchan->vc, &txd->vd, flags); in sun6i_dma_prep_slave_sg()
776 for (p_lli = txd->p_lli, v_lli = txd->v_lli; v_lli; in sun6i_dma_prep_slave_sg()
777 p_lli = v_lli->p_lli_next, v_lli = v_lli->v_lli_next) in sun6i_dma_prep_slave_sg()
778 dma_pool_free(sdev->pool, v_lli, p_lli); in sun6i_dma_prep_slave_sg()
791 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); in sun6i_dma_prep_dma_cyclic()
793 struct dma_slave_config *sconfig = &vchan->cfg; in sun6i_dma_prep_dma_cyclic()
812 v_lli = dma_pool_alloc(sdev->pool, GFP_DMA32 | GFP_NOWAIT, &p_lli); in sun6i_dma_prep_dma_cyclic()
814 dev_err(sdev->slave.dev, "Failed to alloc lli memory\n"); in sun6i_dma_prep_dma_cyclic()
818 v_lli->len = period_len; in sun6i_dma_prep_dma_cyclic()
819 v_lli->para = NORMAL_WAIT; in sun6i_dma_prep_dma_cyclic()
824 sconfig->dst_addr); in sun6i_dma_prep_dma_cyclic()
825 v_lli->cfg = lli_cfg; in sun6i_dma_prep_dma_cyclic()
826 sdev->cfg->set_drq(&v_lli->cfg, DRQ_SDRAM, vchan->port); in sun6i_dma_prep_dma_cyclic()
827 sdev->cfg->set_mode(&v_lli->cfg, LINEAR_MODE, IO_MODE); in sun6i_dma_prep_dma_cyclic()
830 sconfig->src_addr, in sun6i_dma_prep_dma_cyclic()
832 v_lli->cfg = lli_cfg; in sun6i_dma_prep_dma_cyclic()
833 sdev->cfg->set_drq(&v_lli->cfg, vchan->port, DRQ_SDRAM); in sun6i_dma_prep_dma_cyclic()
834 sdev->cfg->set_mode(&v_lli->cfg, IO_MODE, LINEAR_MODE); in sun6i_dma_prep_dma_cyclic()
840 prev->p_lli_next = txd->p_lli; /* cyclic list */ in sun6i_dma_prep_dma_cyclic()
842 vchan->cyclic = true; in sun6i_dma_prep_dma_cyclic()
844 return vchan_tx_prep(&vchan->vc, &txd->vd, flags); in sun6i_dma_prep_dma_cyclic()
847 for (p_lli = txd->p_lli, v_lli = txd->v_lli; v_lli; in sun6i_dma_prep_dma_cyclic()
848 p_lli = v_lli->p_lli_next, v_lli = v_lli->v_lli_next) in sun6i_dma_prep_dma_cyclic()
849 dma_pool_free(sdev->pool, v_lli, p_lli); in sun6i_dma_prep_dma_cyclic()
859 memcpy(&vchan->cfg, config, sizeof(*config)); in sun6i_dma_config()
866 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); in sun6i_dma_pause()
868 struct sun6i_pchan *pchan = vchan->phy; in sun6i_dma_pause()
870 dev_dbg(chan2dev(chan), "vchan %p: pause\n", &vchan->vc); in sun6i_dma_pause()
874 pchan->base + DMA_CHAN_PAUSE); in sun6i_dma_pause()
876 spin_lock(&sdev->lock); in sun6i_dma_pause()
877 list_del_init(&vchan->node); in sun6i_dma_pause()
878 spin_unlock(&sdev->lock); in sun6i_dma_pause()
886 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); in sun6i_dma_resume()
888 struct sun6i_pchan *pchan = vchan->phy; in sun6i_dma_resume()
891 dev_dbg(chan2dev(chan), "vchan %p: resume\n", &vchan->vc); in sun6i_dma_resume()
893 spin_lock_irqsave(&vchan->vc.lock, flags); in sun6i_dma_resume()
897 pchan->base + DMA_CHAN_PAUSE); in sun6i_dma_resume()
898 } else if (!list_empty(&vchan->vc.desc_issued)) { in sun6i_dma_resume()
899 spin_lock(&sdev->lock); in sun6i_dma_resume()
900 list_add_tail(&vchan->node, &sdev->pending); in sun6i_dma_resume()
901 spin_unlock(&sdev->lock); in sun6i_dma_resume()
904 spin_unlock_irqrestore(&vchan->vc.lock, flags); in sun6i_dma_resume()
911 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); in sun6i_dma_terminate_all()
913 struct sun6i_pchan *pchan = vchan->phy; in sun6i_dma_terminate_all()
917 spin_lock(&sdev->lock); in sun6i_dma_terminate_all()
918 list_del_init(&vchan->node); in sun6i_dma_terminate_all()
919 spin_unlock(&sdev->lock); in sun6i_dma_terminate_all()
921 spin_lock_irqsave(&vchan->vc.lock, flags); in sun6i_dma_terminate_all()
923 if (vchan->cyclic) { in sun6i_dma_terminate_all()
924 vchan->cyclic = false; in sun6i_dma_terminate_all()
925 if (pchan && pchan->desc) { in sun6i_dma_terminate_all()
926 struct virt_dma_desc *vd = &pchan->desc->vd; in sun6i_dma_terminate_all()
927 struct virt_dma_chan *vc = &vchan->vc; in sun6i_dma_terminate_all()
929 list_add_tail(&vd->node, &vc->desc_completed); in sun6i_dma_terminate_all()
933 vchan_get_all_descriptors(&vchan->vc, &head); in sun6i_dma_terminate_all()
936 writel(DMA_CHAN_ENABLE_STOP, pchan->base + DMA_CHAN_ENABLE); in sun6i_dma_terminate_all()
937 writel(DMA_CHAN_PAUSE_RESUME, pchan->base + DMA_CHAN_PAUSE); in sun6i_dma_terminate_all()
939 vchan->phy = NULL; in sun6i_dma_terminate_all()
940 pchan->vchan = NULL; in sun6i_dma_terminate_all()
941 pchan->desc = NULL; in sun6i_dma_terminate_all()
942 pchan->done = NULL; in sun6i_dma_terminate_all()
945 spin_unlock_irqrestore(&vchan->vc.lock, flags); in sun6i_dma_terminate_all()
947 vchan_dma_desc_free_list(&vchan->vc, &head); in sun6i_dma_terminate_all()
957 struct sun6i_pchan *pchan = vchan->phy; in sun6i_dma_tx_status()
969 spin_lock_irqsave(&vchan->vc.lock, flags); in sun6i_dma_tx_status()
971 vd = vchan_find_desc(&vchan->vc, cookie); in sun6i_dma_tx_status()
972 txd = to_sun6i_desc(&vd->tx); in sun6i_dma_tx_status()
975 for (lli = txd->v_lli; lli != NULL; lli = lli->v_lli_next) in sun6i_dma_tx_status()
976 bytes += lli->len; in sun6i_dma_tx_status()
977 } else if (!pchan || !pchan->desc) { in sun6i_dma_tx_status()
983 spin_unlock_irqrestore(&vchan->vc.lock, flags); in sun6i_dma_tx_status()
992 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); in sun6i_dma_issue_pending()
996 spin_lock_irqsave(&vchan->vc.lock, flags); in sun6i_dma_issue_pending()
998 if (vchan_issue_pending(&vchan->vc)) { in sun6i_dma_issue_pending()
999 spin_lock(&sdev->lock); in sun6i_dma_issue_pending()
1001 if (!vchan->phy && list_empty(&vchan->node)) { in sun6i_dma_issue_pending()
1002 list_add_tail(&vchan->node, &sdev->pending); in sun6i_dma_issue_pending()
1003 tasklet_schedule(&sdev->task); in sun6i_dma_issue_pending()
1005 &vchan->vc); in sun6i_dma_issue_pending()
1008 spin_unlock(&sdev->lock); in sun6i_dma_issue_pending()
1011 &vchan->vc); in sun6i_dma_issue_pending()
1014 spin_unlock_irqrestore(&vchan->vc.lock, flags); in sun6i_dma_issue_pending()
1019 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); in sun6i_dma_free_chan_resources()
1023 spin_lock_irqsave(&sdev->lock, flags); in sun6i_dma_free_chan_resources()
1024 list_del_init(&vchan->node); in sun6i_dma_free_chan_resources()
1025 spin_unlock_irqrestore(&sdev->lock, flags); in sun6i_dma_free_chan_resources()
1027 vchan_free_chan_resources(&vchan->vc); in sun6i_dma_free_chan_resources()
1033 struct sun6i_dma_dev *sdev = ofdma->of_dma_data; in sun6i_dma_of_xlate()
1036 u8 port = dma_spec->args[0]; in sun6i_dma_of_xlate()
1038 if (port > sdev->max_request) in sun6i_dma_of_xlate()
1041 chan = dma_get_any_slave_channel(&sdev->slave); in sun6i_dma_of_xlate()
1046 vchan->port = port; in sun6i_dma_of_xlate()
1054 writel(0, sdev->base + DMA_IRQ_EN(0)); in sun6i_kill_tasklet()
1055 writel(0, sdev->base + DMA_IRQ_EN(1)); in sun6i_kill_tasklet()
1058 atomic_inc(&sdev->tasklet_shutdown); in sun6i_kill_tasklet()
1061 devm_free_irq(sdev->slave.dev, sdev->irq, sdev); in sun6i_kill_tasklet()
1064 tasklet_kill(&sdev->task); in sun6i_kill_tasklet()
1071 for (i = 0; i < sdev->num_vchans; i++) { in sun6i_dma_free()
1072 struct sun6i_vchan *vchan = &sdev->vchans[i]; in sun6i_dma_free()
1074 list_del(&vchan->vc.chan.device_node); in sun6i_dma_free()
1075 tasklet_kill(&vchan->vc.task); in sun6i_dma_free()
1181 * The A64 binding uses the number of dma channels from the
1270 { .compatible = "allwinner,sun6i-a31-dma", .data = &sun6i_a31_dma_cfg },
1271 { .compatible = "allwinner,sun8i-a23-dma", .data = &sun8i_a23_dma_cfg },
1272 { .compatible = "allwinner,sun8i-a83t-dma", .data = &sun8i_a83t_dma_cfg },
1273 { .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg },
1274 { .compatible = "allwinner,sun8i-v3s-dma", .data = &sun8i_v3s_dma_cfg },
1275 { .compatible = "allwinner,sun20i-d1-dma", .data = &sun50i_a100_dma_cfg },
1276 { .compatible = "allwinner,sun50i-a64-dma", .data = &sun50i_a64_dma_cfg },
1277 { .compatible = "allwinner,sun50i-a100-dma", .data = &sun50i_a100_dma_cfg },
1278 { .compatible = "allwinner,sun50i-h6-dma", .data = &sun50i_h6_dma_cfg },
1285 struct device_node *np = pdev->dev.of_node; in sun6i_dma_probe()
1289 sdc = devm_kzalloc(&pdev->dev, sizeof(*sdc), GFP_KERNEL); in sun6i_dma_probe()
1291 return -ENOMEM; in sun6i_dma_probe()
1293 sdc->cfg = of_device_get_match_data(&pdev->dev); in sun6i_dma_probe()
1294 if (!sdc->cfg) in sun6i_dma_probe()
1295 return -ENODEV; in sun6i_dma_probe()
1297 sdc->base = devm_platform_ioremap_resource(pdev, 0); in sun6i_dma_probe()
1298 if (IS_ERR(sdc->base)) in sun6i_dma_probe()
1299 return PTR_ERR(sdc->base); in sun6i_dma_probe()
1301 sdc->irq = platform_get_irq(pdev, 0); in sun6i_dma_probe()
1302 if (sdc->irq < 0) in sun6i_dma_probe()
1303 return sdc->irq; in sun6i_dma_probe()
1305 sdc->clk = devm_clk_get(&pdev->dev, NULL); in sun6i_dma_probe()
1306 if (IS_ERR(sdc->clk)) { in sun6i_dma_probe()
1307 dev_err(&pdev->dev, "No clock specified\n"); in sun6i_dma_probe()
1308 return PTR_ERR(sdc->clk); in sun6i_dma_probe()
1311 if (sdc->cfg->has_mbus_clk) { in sun6i_dma_probe()
1312 sdc->clk_mbus = devm_clk_get(&pdev->dev, "mbus"); in sun6i_dma_probe()
1313 if (IS_ERR(sdc->clk_mbus)) { in sun6i_dma_probe()
1314 dev_err(&pdev->dev, "No mbus clock specified\n"); in sun6i_dma_probe()
1315 return PTR_ERR(sdc->clk_mbus); in sun6i_dma_probe()
1319 sdc->rstc = devm_reset_control_get(&pdev->dev, NULL); in sun6i_dma_probe()
1320 if (IS_ERR(sdc->rstc)) { in sun6i_dma_probe()
1321 dev_err(&pdev->dev, "No reset controller specified\n"); in sun6i_dma_probe()
1322 return PTR_ERR(sdc->rstc); in sun6i_dma_probe()
1325 sdc->pool = dmam_pool_create(dev_name(&pdev->dev), &pdev->dev, in sun6i_dma_probe()
1327 if (!sdc->pool) { in sun6i_dma_probe()
1328 dev_err(&pdev->dev, "No memory for descriptors dma pool\n"); in sun6i_dma_probe()
1329 return -ENOMEM; in sun6i_dma_probe()
1333 INIT_LIST_HEAD(&sdc->pending); in sun6i_dma_probe()
1334 spin_lock_init(&sdc->lock); in sun6i_dma_probe()
1336 dma_set_max_seg_size(&pdev->dev, SZ_32M - 1); in sun6i_dma_probe()
1338 dma_cap_set(DMA_PRIVATE, sdc->slave.cap_mask); in sun6i_dma_probe()
1339 dma_cap_set(DMA_MEMCPY, sdc->slave.cap_mask); in sun6i_dma_probe()
1340 dma_cap_set(DMA_SLAVE, sdc->slave.cap_mask); in sun6i_dma_probe()
1341 dma_cap_set(DMA_CYCLIC, sdc->slave.cap_mask); in sun6i_dma_probe()
1343 INIT_LIST_HEAD(&sdc->slave.channels); in sun6i_dma_probe()
1344 sdc->slave.device_free_chan_resources = sun6i_dma_free_chan_resources; in sun6i_dma_probe()
1345 sdc->slave.device_tx_status = sun6i_dma_tx_status; in sun6i_dma_probe()
1346 sdc->slave.device_issue_pending = sun6i_dma_issue_pending; in sun6i_dma_probe()
1347 sdc->slave.device_prep_slave_sg = sun6i_dma_prep_slave_sg; in sun6i_dma_probe()
1348 sdc->slave.device_prep_dma_memcpy = sun6i_dma_prep_dma_memcpy; in sun6i_dma_probe()
1349 sdc->slave.device_prep_dma_cyclic = sun6i_dma_prep_dma_cyclic; in sun6i_dma_probe()
1350 sdc->slave.copy_align = DMAENGINE_ALIGN_4_BYTES; in sun6i_dma_probe()
1351 sdc->slave.device_config = sun6i_dma_config; in sun6i_dma_probe()
1352 sdc->slave.device_pause = sun6i_dma_pause; in sun6i_dma_probe()
1353 sdc->slave.device_resume = sun6i_dma_resume; in sun6i_dma_probe()
1354 sdc->slave.device_terminate_all = sun6i_dma_terminate_all; in sun6i_dma_probe()
1355 sdc->slave.src_addr_widths = sdc->cfg->src_addr_widths; in sun6i_dma_probe()
1356 sdc->slave.dst_addr_widths = sdc->cfg->dst_addr_widths; in sun6i_dma_probe()
1357 sdc->slave.directions = BIT(DMA_DEV_TO_MEM) | in sun6i_dma_probe()
1359 sdc->slave.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; in sun6i_dma_probe()
1360 sdc->slave.dev = &pdev->dev; in sun6i_dma_probe()
1362 sdc->num_pchans = sdc->cfg->nr_max_channels; in sun6i_dma_probe()
1363 sdc->num_vchans = sdc->cfg->nr_max_vchans; in sun6i_dma_probe()
1364 sdc->max_request = sdc->cfg->nr_max_requests; in sun6i_dma_probe()
1366 ret = of_property_read_u32(np, "dma-channels", &sdc->num_pchans); in sun6i_dma_probe()
1367 if (ret && !sdc->num_pchans) { in sun6i_dma_probe()
1368 dev_err(&pdev->dev, "Can't get dma-channels.\n"); in sun6i_dma_probe()
1372 ret = of_property_read_u32(np, "dma-requests", &sdc->max_request); in sun6i_dma_probe()
1373 if (ret && !sdc->max_request) { in sun6i_dma_probe()
1374 dev_info(&pdev->dev, "Missing dma-requests, using %u.\n", in sun6i_dma_probe()
1376 sdc->max_request = DMA_CHAN_MAX_DRQ_A31; in sun6i_dma_probe()
1383 if (!sdc->num_vchans) in sun6i_dma_probe()
1384 sdc->num_vchans = 2 * (sdc->max_request + 1); in sun6i_dma_probe()
1386 sdc->pchans = devm_kcalloc(&pdev->dev, sdc->num_pchans, in sun6i_dma_probe()
1388 if (!sdc->pchans) in sun6i_dma_probe()
1389 return -ENOMEM; in sun6i_dma_probe()
1391 sdc->vchans = devm_kcalloc(&pdev->dev, sdc->num_vchans, in sun6i_dma_probe()
1393 if (!sdc->vchans) in sun6i_dma_probe()
1394 return -ENOMEM; in sun6i_dma_probe()
1396 tasklet_setup(&sdc->task, sun6i_dma_tasklet); in sun6i_dma_probe()
1398 for (i = 0; i < sdc->num_pchans; i++) { in sun6i_dma_probe()
1399 struct sun6i_pchan *pchan = &sdc->pchans[i]; in sun6i_dma_probe()
1401 pchan->idx = i; in sun6i_dma_probe()
1402 pchan->base = sdc->base + 0x100 + i * 0x40; in sun6i_dma_probe()
1405 for (i = 0; i < sdc->num_vchans; i++) { in sun6i_dma_probe()
1406 struct sun6i_vchan *vchan = &sdc->vchans[i]; in sun6i_dma_probe()
1408 INIT_LIST_HEAD(&vchan->node); in sun6i_dma_probe()
1409 vchan->vc.desc_free = sun6i_dma_free_desc; in sun6i_dma_probe()
1410 vchan_init(&vchan->vc, &sdc->slave); in sun6i_dma_probe()
1413 ret = reset_control_deassert(sdc->rstc); in sun6i_dma_probe()
1415 dev_err(&pdev->dev, "Couldn't deassert the device from reset\n"); in sun6i_dma_probe()
1419 ret = clk_prepare_enable(sdc->clk); in sun6i_dma_probe()
1421 dev_err(&pdev->dev, "Couldn't enable the clock\n"); in sun6i_dma_probe()
1425 if (sdc->cfg->has_mbus_clk) { in sun6i_dma_probe()
1426 ret = clk_prepare_enable(sdc->clk_mbus); in sun6i_dma_probe()
1428 dev_err(&pdev->dev, "Couldn't enable mbus clock\n"); in sun6i_dma_probe()
1433 ret = devm_request_irq(&pdev->dev, sdc->irq, sun6i_dma_interrupt, 0, in sun6i_dma_probe()
1434 dev_name(&pdev->dev), sdc); in sun6i_dma_probe()
1436 dev_err(&pdev->dev, "Cannot request IRQ\n"); in sun6i_dma_probe()
1440 ret = dma_async_device_register(&sdc->slave); in sun6i_dma_probe()
1442 dev_warn(&pdev->dev, "Failed to register DMA engine device\n"); in sun6i_dma_probe()
1446 ret = of_dma_controller_register(pdev->dev.of_node, sun6i_dma_of_xlate, in sun6i_dma_probe()
1449 dev_err(&pdev->dev, "of_dma_controller_register failed\n"); in sun6i_dma_probe()
1453 if (sdc->cfg->clock_autogate_enable) in sun6i_dma_probe()
1454 sdc->cfg->clock_autogate_enable(sdc); in sun6i_dma_probe()
1459 dma_async_device_unregister(&sdc->slave); in sun6i_dma_probe()
1463 clk_disable_unprepare(sdc->clk_mbus); in sun6i_dma_probe()
1465 clk_disable_unprepare(sdc->clk); in sun6i_dma_probe()
1467 reset_control_assert(sdc->rstc); in sun6i_dma_probe()
1477 of_dma_controller_free(pdev->dev.of_node); in sun6i_dma_remove()
1478 dma_async_device_unregister(&sdc->slave); in sun6i_dma_remove()
1482 clk_disable_unprepare(sdc->clk_mbus); in sun6i_dma_remove()
1483 clk_disable_unprepare(sdc->clk); in sun6i_dma_remove()
1484 reset_control_assert(sdc->rstc); in sun6i_dma_remove()
1495 .name = "sun6i-dma",
1503 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");