218 	struct stm32_mdma_hwdesc *hwdesc;  member
326 		desc->node[i].hwdesc =  in stm32_mdma_alloc_desc()
329 		if (!desc->node[i].hwdesc)  in stm32_mdma_alloc_desc()
340 		dma_pool_free(chan->desc_pool, desc->node[i].hwdesc,  in stm32_mdma_alloc_desc()
353 		dma_pool_free(chan->desc_pool, desc->node[i].hwdesc,  in stm32_mdma_desc_free()
677 	dev_dbg(chan2dev(chan), "CTCR:    0x%08x\n", node->hwdesc->ctcr);  in stm32_mdma_dump_hwdesc()
678 	dev_dbg(chan2dev(chan), "CBNDTR:  0x%08x\n", node->hwdesc->cbndtr);  in stm32_mdma_dump_hwdesc()
679 	dev_dbg(chan2dev(chan), "CSAR:    0x%08x\n", node->hwdesc->csar);  in stm32_mdma_dump_hwdesc()
680 	dev_dbg(chan2dev(chan), "CDAR:    0x%08x\n", node->hwdesc->cdar);  in stm32_mdma_dump_hwdesc()
681 	dev_dbg(chan2dev(chan), "CBRUR:   0x%08x\n", node->hwdesc->cbrur);  in stm32_mdma_dump_hwdesc()
682 	dev_dbg(chan2dev(chan), "CLAR:    0x%08x\n", node->hwdesc->clar);  in stm32_mdma_dump_hwdesc()
683 	dev_dbg(chan2dev(chan), "CTBR:    0x%08x\n", node->hwdesc->ctbr);  in stm32_mdma_dump_hwdesc()
684 	dev_dbg(chan2dev(chan), "CMAR:    0x%08x\n", node->hwdesc->cmar);  in stm32_mdma_dump_hwdesc()
685 	dev_dbg(chan2dev(chan), "CMDR:    0x%08x\n\n", node->hwdesc->cmdr);  in stm32_mdma_dump_hwdesc()
696 	struct stm32_mdma_hwdesc *hwdesc;  in stm32_mdma_setup_hwdesc()  local
699 	hwdesc = desc->node[count].hwdesc;  in stm32_mdma_setup_hwdesc()
700 	hwdesc->ctcr = ctcr;  in stm32_mdma_setup_hwdesc()
701 	hwdesc->cbndtr &= ~(STM32_MDMA_CBNDTR_BRC_MK |  in stm32_mdma_setup_hwdesc()
705 	hwdesc->cbndtr |= STM32_MDMA_CBNDTR_BNDT(len);  in stm32_mdma_setup_hwdesc()
706 	hwdesc->csar = src_addr;  in stm32_mdma_setup_hwdesc()
707 	hwdesc->cdar = dst_addr;  in stm32_mdma_setup_hwdesc()
708 	hwdesc->cbrur = 0;  in stm32_mdma_setup_hwdesc()
709 	hwdesc->ctbr = ctbr;  in stm32_mdma_setup_hwdesc()
710 	hwdesc->cmar = config->mask_addr;  in stm32_mdma_setup_hwdesc()
711 	hwdesc->cmdr = config->mask_data;  in stm32_mdma_setup_hwdesc()
715 			hwdesc->clar = desc->node[0].hwdesc_phys;  in stm32_mdma_setup_hwdesc()
717 			hwdesc->clar = 0;  in stm32_mdma_setup_hwdesc()
719 		hwdesc->clar = desc->node[next].hwdesc_phys;  in stm32_mdma_setup_hwdesc()
820 		struct stm32_mdma_hwdesc *hwdesc;  in stm32_mdma_prep_slave_sg()  local
823 			hwdesc = desc->node[i].hwdesc;  in stm32_mdma_prep_slave_sg()
824 			hwdesc->cmar = 0;  in stm32_mdma_prep_slave_sg()
825 			hwdesc->cmdr = 0;  in stm32_mdma_prep_slave_sg()
835 		dma_pool_free(chan->desc_pool, desc->node[i].hwdesc,  in stm32_mdma_prep_slave_sg()
931 		dma_pool_free(chan->desc_pool, desc->node[i].hwdesc,  in stm32_mdma_prep_dma_cyclic()
945 	struct stm32_mdma_hwdesc *hwdesc;  in stm32_mdma_prep_dma_memcpy()  local
1046 		hwdesc = desc->node[0].hwdesc;  in stm32_mdma_prep_dma_memcpy()
1047 		hwdesc->ctcr = ctcr;  in stm32_mdma_prep_dma_memcpy()
1048 		hwdesc->cbndtr = cbndtr;  in stm32_mdma_prep_dma_memcpy()
1049 		hwdesc->csar = src;  in stm32_mdma_prep_dma_memcpy()
1050 		hwdesc->cdar = dest;  in stm32_mdma_prep_dma_memcpy()
1051 		hwdesc->cbrur = 0;  in stm32_mdma_prep_dma_memcpy()
1052 		hwdesc->clar = 0;  in stm32_mdma_prep_dma_memcpy()
1053 		hwdesc->ctbr = ctbr;  in stm32_mdma_prep_dma_memcpy()
1054 		hwdesc->cmar = 0;  in stm32_mdma_prep_dma_memcpy()
1055 		hwdesc->cmdr = 0;  in stm32_mdma_prep_dma_memcpy()
1146 	struct stm32_mdma_hwdesc *hwdesc;  in stm32_mdma_start_transfer()  local
1159 	hwdesc = chan->desc->node[0].hwdesc;  in stm32_mdma_start_transfer()
1163 	stm32_mdma_write(dmadev, STM32_MDMA_CTCR(id), hwdesc->ctcr);  in stm32_mdma_start_transfer()
1164 	stm32_mdma_write(dmadev, STM32_MDMA_CBNDTR(id), hwdesc->cbndtr);  in stm32_mdma_start_transfer()
1165 	stm32_mdma_write(dmadev, STM32_MDMA_CSAR(id), hwdesc->csar);  in stm32_mdma_start_transfer()
1166 	stm32_mdma_write(dmadev, STM32_MDMA_CDAR(id), hwdesc->cdar);  in stm32_mdma_start_transfer()
1167 	stm32_mdma_write(dmadev, STM32_MDMA_CBRUR(id), hwdesc->cbrur);  in stm32_mdma_start_transfer()
1168 	stm32_mdma_write(dmadev, STM32_MDMA_CLAR(id), hwdesc->clar);  in stm32_mdma_start_transfer()
1169 	stm32_mdma_write(dmadev, STM32_MDMA_CTBR(id), hwdesc->ctbr);  in stm32_mdma_start_transfer()
1170 	stm32_mdma_write(dmadev, STM32_MDMA_CMAR(id), hwdesc->cmar);  in stm32_mdma_start_transfer()
1171 	stm32_mdma_write(dmadev, STM32_MDMA_CMDR(id), hwdesc->cmdr);  in stm32_mdma_start_transfer()
1184 	if (hwdesc->ctcr & STM32_MDMA_CTCR_SWRM) {  in stm32_mdma_start_transfer()
1233 	struct stm32_mdma_hwdesc *hwdesc;  in stm32_mdma_resume()  local
1241 	hwdesc = chan->desc->node[chan->curr_hwdesc].hwdesc;  in stm32_mdma_resume()
1260 	if (hwdesc->ctcr & STM32_MDMA_CTCR_SWRM)  in stm32_mdma_resume()
1325 	struct stm32_mdma_hwdesc *hwdesc;  in stm32_mdma_desc_residue()  local
1335 		hwdesc = desc->node[i].hwdesc;  in stm32_mdma_desc_residue()
1337 		if (hwdesc->clar == clar)  in stm32_mdma_desc_residue()
1341 		residue += STM32_MDMA_CBNDTR_BNDT(hwdesc->cbndtr);  in stm32_mdma_desc_residue()