Lines Matching refs:STM32_DMA_SCR_DBM
67 #define STM32_DMA_SCR_DBM BIT(18) /* Double Buffer Mode */ macro
663 dma_scr |= STM32_DMA_SCR_DBM; in stm32_dma_handle_chan_paused()
672 dma_scr &= ~(STM32_DMA_SCR_DBM | STM32_DMA_SCR_CIRC); in stm32_dma_handle_chan_paused()
713 if (chan->chan_reg.dma_scr & STM32_DMA_SCR_DBM) { in stm32_dma_post_resume_reconfigure()
714 dma_scr |= STM32_DMA_SCR_DBM; in stm32_dma_post_resume_reconfigure()
746 if (!(scr & (STM32_DMA_SCR_CIRC | STM32_DMA_SCR_DBM))) in stm32_dma_handle_chan_done()
748 else if (scr & STM32_DMA_SCR_DBM) in stm32_dma_handle_chan_done()
899 if ((chan_reg.dma_scr & STM32_DMA_SCR_DBM) && (chan_reg.dma_scr & STM32_DMA_SCR_CT)) in stm32_dma_resume()
911 if (chan_reg.dma_scr & (STM32_DMA_SCR_CIRC | STM32_DMA_SCR_DBM)) in stm32_dma_resume()
912 chan_reg.dma_scr &= ~(STM32_DMA_SCR_CIRC | STM32_DMA_SCR_DBM); in stm32_dma_resume()
914 if (chan_reg.dma_scr & STM32_DMA_SCR_DBM) in stm32_dma_resume()
1117 chan->chan_reg.dma_scr |= STM32_DMA_SCR_DBM; in stm32_dma_prep_slave_sg()
1209 chan->chan_reg.dma_scr |= STM32_DMA_SCR_DBM; in stm32_dma_prep_dma_cyclic()
1333 if (!(dma_scr & STM32_DMA_SCR_DBM)) in stm32_dma_is_current_sg()