Lines Matching +full:fu540 +full:- +full:c000
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * SiFive FU540 Platform DMA driver
7 * - drivers/dma/fsl-edma.c
8 * - drivers/dma/dw-edma/
9 * - drivers/dma/pxa-dma.c
12 * - Chapter 12 "Platform DMA Engine (PDMA)" of
13 * SiFive FU540-C000 v1.0
14 * https://static.dev.sifive.com/FU540-C000-v1.0.pdf
21 #include <linux/dma-mapping.h>
25 #include "sf-pdma.h"
60 desc->chan = chan; in sf_pdma_alloc_desc()
68 desc->xfer_type = PDMA_FULL_SPEED; in sf_pdma_fill_desc()
69 desc->xfer_size = size; in sf_pdma_fill_desc()
70 desc->dst_addr = dst; in sf_pdma_fill_desc()
71 desc->src_addr = src; in sf_pdma_fill_desc()
76 struct pdma_regs *regs = &chan->regs; in sf_pdma_disclaim_chan()
78 writel(PDMA_CLEAR_CTRL, regs->ctrl); in sf_pdma_disclaim_chan()
90 dev_err(chan->pdma->dma_dev.dev, in sf_pdma_prep_dma_memcpy()
99 desc->dirn = DMA_MEM_TO_MEM; in sf_pdma_prep_dma_memcpy()
100 desc->async_tx = vchan_tx_prep(&chan->vchan, &desc->vdesc, flags); in sf_pdma_prep_dma_memcpy()
102 spin_lock_irqsave(&chan->vchan.lock, iflags); in sf_pdma_prep_dma_memcpy()
104 spin_unlock_irqrestore(&chan->vchan.lock, iflags); in sf_pdma_prep_dma_memcpy()
106 return desc->async_tx; in sf_pdma_prep_dma_memcpy()
114 memcpy(&chan->cfg, cfg, sizeof(*cfg)); in sf_pdma_slave_config()
122 struct pdma_regs *regs = &chan->regs; in sf_pdma_alloc_chan_resources()
125 writel(PDMA_CLAIM_MASK, regs->ctrl); in sf_pdma_alloc_chan_resources()
132 struct pdma_regs *regs = &chan->regs; in sf_pdma_disable_request()
134 writel(readl(regs->ctrl) & ~PDMA_RUN_MASK, regs->ctrl); in sf_pdma_disable_request()
143 spin_lock_irqsave(&chan->vchan.lock, flags); in sf_pdma_free_chan_resources()
145 kfree(chan->desc); in sf_pdma_free_chan_resources()
146 chan->desc = NULL; in sf_pdma_free_chan_resources()
147 vchan_get_all_descriptors(&chan->vchan, &head); in sf_pdma_free_chan_resources()
149 spin_unlock_irqrestore(&chan->vchan.lock, flags); in sf_pdma_free_chan_resources()
150 vchan_dma_desc_free_list(&chan->vchan, &head); in sf_pdma_free_chan_resources()
157 struct pdma_regs *regs = &chan->regs; in sf_pdma_desc_residue()
163 spin_lock_irqsave(&chan->vchan.lock, flags); in sf_pdma_desc_residue()
165 list_for_each_entry(vd, &chan->vchan.desc_submitted, node) in sf_pdma_desc_residue()
166 if (vd->tx.cookie == cookie) in sf_pdma_desc_residue()
167 tx = &vd->tx; in sf_pdma_desc_residue()
172 if (cookie == tx->chan->completed_cookie) in sf_pdma_desc_residue()
175 if (cookie == tx->cookie) { in sf_pdma_desc_residue()
176 residue = readq(regs->residue); in sf_pdma_desc_residue()
178 vd = vchan_find_desc(&chan->vchan, cookie); in sf_pdma_desc_residue()
183 residue = desc->xfer_size; in sf_pdma_desc_residue()
187 spin_unlock_irqrestore(&chan->vchan.lock, flags); in sf_pdma_desc_residue()
213 spin_lock_irqsave(&chan->vchan.lock, flags); in sf_pdma_terminate_all()
215 kfree(chan->desc); in sf_pdma_terminate_all()
216 chan->desc = NULL; in sf_pdma_terminate_all()
217 chan->xfer_err = false; in sf_pdma_terminate_all()
218 vchan_get_all_descriptors(&chan->vchan, &head); in sf_pdma_terminate_all()
219 spin_unlock_irqrestore(&chan->vchan.lock, flags); in sf_pdma_terminate_all()
220 vchan_dma_desc_free_list(&chan->vchan, &head); in sf_pdma_terminate_all()
227 struct pdma_regs *regs = &chan->regs; in sf_pdma_enable_request()
235 writel(v, regs->ctrl); in sf_pdma_enable_request()
240 struct virt_dma_chan *vchan = &chan->vchan; in sf_pdma_get_first_pending_desc()
243 if (list_empty(&vchan->desc_issued)) in sf_pdma_get_first_pending_desc()
246 vdesc = list_first_entry(&vchan->desc_issued, struct virt_dma_desc, node); in sf_pdma_get_first_pending_desc()
253 struct sf_pdma_desc *desc = chan->desc; in sf_pdma_xfer_desc()
254 struct pdma_regs *regs = &chan->regs; in sf_pdma_xfer_desc()
257 dev_err(chan->pdma->dma_dev.dev, "NULL desc.\n"); in sf_pdma_xfer_desc()
261 writel(desc->xfer_type, regs->xfer_type); in sf_pdma_xfer_desc()
262 writeq(desc->xfer_size, regs->xfer_size); in sf_pdma_xfer_desc()
263 writeq(desc->dst_addr, regs->dst_addr); in sf_pdma_xfer_desc()
264 writeq(desc->src_addr, regs->src_addr); in sf_pdma_xfer_desc()
266 chan->desc = desc; in sf_pdma_xfer_desc()
267 chan->status = DMA_IN_PROGRESS; in sf_pdma_xfer_desc()
276 spin_lock_irqsave(&chan->vchan.lock, flags); in sf_pdma_issue_pending()
278 if (!chan->desc && vchan_issue_pending(&chan->vchan)) { in sf_pdma_issue_pending()
280 chan->desc = sf_pdma_get_first_pending_desc(chan); in sf_pdma_issue_pending()
284 spin_unlock_irqrestore(&chan->vchan.lock, flags); in sf_pdma_issue_pending()
300 spin_lock_irqsave(&chan->lock, flags); in sf_pdma_donebh_tasklet()
301 if (chan->xfer_err) { in sf_pdma_donebh_tasklet()
302 chan->retries = MAX_RETRY; in sf_pdma_donebh_tasklet()
303 chan->status = DMA_COMPLETE; in sf_pdma_donebh_tasklet()
304 chan->xfer_err = false; in sf_pdma_donebh_tasklet()
306 spin_unlock_irqrestore(&chan->lock, flags); in sf_pdma_donebh_tasklet()
308 spin_lock_irqsave(&chan->vchan.lock, flags); in sf_pdma_donebh_tasklet()
309 list_del(&chan->desc->vdesc.node); in sf_pdma_donebh_tasklet()
310 vchan_cookie_complete(&chan->desc->vdesc); in sf_pdma_donebh_tasklet()
312 chan->desc = sf_pdma_get_first_pending_desc(chan); in sf_pdma_donebh_tasklet()
313 if (chan->desc) in sf_pdma_donebh_tasklet()
316 spin_unlock_irqrestore(&chan->vchan.lock, flags); in sf_pdma_donebh_tasklet()
322 struct sf_pdma_desc *desc = chan->desc; in sf_pdma_errbh_tasklet()
325 spin_lock_irqsave(&chan->lock, flags); in sf_pdma_errbh_tasklet()
326 if (chan->retries <= 0) { in sf_pdma_errbh_tasklet()
328 spin_unlock_irqrestore(&chan->lock, flags); in sf_pdma_errbh_tasklet()
329 dmaengine_desc_get_callback_invoke(desc->async_tx, NULL); in sf_pdma_errbh_tasklet()
332 chan->retries--; in sf_pdma_errbh_tasklet()
333 chan->xfer_err = true; in sf_pdma_errbh_tasklet()
334 chan->status = DMA_ERROR; in sf_pdma_errbh_tasklet()
337 spin_unlock_irqrestore(&chan->lock, flags); in sf_pdma_errbh_tasklet()
344 struct pdma_regs *regs = &chan->regs; in sf_pdma_done_isr()
347 spin_lock(&chan->vchan.lock); in sf_pdma_done_isr()
348 writel((readl(regs->ctrl)) & ~PDMA_DONE_STATUS_MASK, regs->ctrl); in sf_pdma_done_isr()
349 residue = readq(regs->residue); in sf_pdma_done_isr()
352 tasklet_hi_schedule(&chan->done_tasklet); in sf_pdma_done_isr()
355 struct sf_pdma_desc *desc = chan->desc; in sf_pdma_done_isr()
357 desc->src_addr += desc->xfer_size - residue; in sf_pdma_done_isr()
358 desc->dst_addr += desc->xfer_size - residue; in sf_pdma_done_isr()
359 desc->xfer_size = residue; in sf_pdma_done_isr()
364 spin_unlock(&chan->vchan.lock); in sf_pdma_done_isr()
372 struct pdma_regs *regs = &chan->regs; in sf_pdma_err_isr()
374 spin_lock(&chan->lock); in sf_pdma_err_isr()
375 writel((readl(regs->ctrl)) & ~PDMA_ERR_STATUS_MASK, regs->ctrl); in sf_pdma_err_isr()
376 spin_unlock(&chan->lock); in sf_pdma_err_isr()
378 tasklet_schedule(&chan->err_tasklet); in sf_pdma_err_isr()
384 * sf_pdma_irq_init() - Init PDMA IRQ Handlers
389 * make sure the pointer passed in are non-NULL. This function should be called
395 * * 0 - OK to init all IRQ handlers
396 * * -EINVAL - Fail to request IRQ
403 for (i = 0; i < pdma->n_chans; i++) { in sf_pdma_irq_init()
404 chan = &pdma->chans[i]; in sf_pdma_irq_init()
408 return -EINVAL; in sf_pdma_irq_init()
410 r = devm_request_irq(&pdev->dev, irq, sf_pdma_done_isr, 0, in sf_pdma_irq_init()
411 dev_name(&pdev->dev), (void *)chan); in sf_pdma_irq_init()
413 dev_err(&pdev->dev, "Fail to attach done ISR: %d\n", r); in sf_pdma_irq_init()
414 return -EINVAL; in sf_pdma_irq_init()
417 chan->txirq = irq; in sf_pdma_irq_init()
421 return -EINVAL; in sf_pdma_irq_init()
423 r = devm_request_irq(&pdev->dev, irq, sf_pdma_err_isr, 0, in sf_pdma_irq_init()
424 dev_name(&pdev->dev), (void *)chan); in sf_pdma_irq_init()
426 dev_err(&pdev->dev, "Fail to attach err ISR: %d\n", r); in sf_pdma_irq_init()
427 return -EINVAL; in sf_pdma_irq_init()
430 chan->errirq = irq; in sf_pdma_irq_init()
437 * sf_pdma_setup_chans() - Init settings of each channel
441 * the pointer passed in are non-NULL. This function should be called only
453 INIT_LIST_HEAD(&pdma->dma_dev.channels); in sf_pdma_setup_chans()
455 for (i = 0; i < pdma->n_chans; i++) { in sf_pdma_setup_chans()
456 chan = &pdma->chans[i]; in sf_pdma_setup_chans()
458 chan->regs.ctrl = in sf_pdma_setup_chans()
460 chan->regs.xfer_type = in sf_pdma_setup_chans()
462 chan->regs.xfer_size = in sf_pdma_setup_chans()
464 chan->regs.dst_addr = in sf_pdma_setup_chans()
466 chan->regs.src_addr = in sf_pdma_setup_chans()
468 chan->regs.act_type = in sf_pdma_setup_chans()
470 chan->regs.residue = in sf_pdma_setup_chans()
472 chan->regs.cur_dst_addr = in sf_pdma_setup_chans()
474 chan->regs.cur_src_addr = in sf_pdma_setup_chans()
477 chan->pdma = pdma; in sf_pdma_setup_chans()
478 chan->pm_state = RUNNING; in sf_pdma_setup_chans()
479 chan->slave_id = i; in sf_pdma_setup_chans()
480 chan->xfer_err = false; in sf_pdma_setup_chans()
481 spin_lock_init(&chan->lock); in sf_pdma_setup_chans()
483 chan->vchan.desc_free = sf_pdma_free_desc; in sf_pdma_setup_chans()
484 vchan_init(&chan->vchan, &pdma->dma_dev); in sf_pdma_setup_chans()
486 writel(PDMA_CLEAR_CTRL, chan->regs.ctrl); in sf_pdma_setup_chans()
488 tasklet_setup(&chan->done_tasklet, sf_pdma_donebh_tasklet); in sf_pdma_setup_chans()
489 tasklet_setup(&chan->err_tasklet, sf_pdma_errbh_tasklet); in sf_pdma_setup_chans()
503 ret = of_property_read_u32(pdev->dev.of_node, "dma-channels", &n_chans); in sf_pdma_probe()
505 /* backwards-compatibility for no dma-channels property */ in sf_pdma_probe()
506 dev_dbg(&pdev->dev, "set number of channels to default value: 4\n"); in sf_pdma_probe()
509 dev_err(&pdev->dev, "the number of channels exceeds the maximum\n"); in sf_pdma_probe()
510 return -EINVAL; in sf_pdma_probe()
513 pdma = devm_kzalloc(&pdev->dev, struct_size(pdma, chans, n_chans), in sf_pdma_probe()
516 return -ENOMEM; in sf_pdma_probe()
518 pdma->n_chans = n_chans; in sf_pdma_probe()
520 pdma->membase = devm_platform_ioremap_resource(pdev, 0); in sf_pdma_probe()
521 if (IS_ERR(pdma->membase)) in sf_pdma_probe()
522 return PTR_ERR(pdma->membase); in sf_pdma_probe()
530 pdma->dma_dev.dev = &pdev->dev; in sf_pdma_probe()
533 dma_cap_set(DMA_MEMCPY, pdma->dma_dev.cap_mask); in sf_pdma_probe()
534 pdma->dma_dev.copy_align = 2; in sf_pdma_probe()
535 pdma->dma_dev.src_addr_widths = widths; in sf_pdma_probe()
536 pdma->dma_dev.dst_addr_widths = widths; in sf_pdma_probe()
537 pdma->dma_dev.directions = BIT(DMA_MEM_TO_MEM); in sf_pdma_probe()
538 pdma->dma_dev.residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR; in sf_pdma_probe()
539 pdma->dma_dev.descriptor_reuse = true; in sf_pdma_probe()
542 pdma->dma_dev.device_alloc_chan_resources = in sf_pdma_probe()
544 pdma->dma_dev.device_free_chan_resources = in sf_pdma_probe()
546 pdma->dma_dev.device_tx_status = sf_pdma_tx_status; in sf_pdma_probe()
547 pdma->dma_dev.device_prep_dma_memcpy = sf_pdma_prep_dma_memcpy; in sf_pdma_probe()
548 pdma->dma_dev.device_config = sf_pdma_slave_config; in sf_pdma_probe()
549 pdma->dma_dev.device_terminate_all = sf_pdma_terminate_all; in sf_pdma_probe()
550 pdma->dma_dev.device_issue_pending = sf_pdma_issue_pending; in sf_pdma_probe()
554 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); in sf_pdma_probe()
556 dev_warn(&pdev->dev, in sf_pdma_probe()
559 ret = dma_async_device_register(&pdma->dma_dev); in sf_pdma_probe()
561 dev_err(&pdev->dev, in sf_pdma_probe()
575 for (i = 0; i < pdma->n_chans; i++) { in sf_pdma_remove()
576 ch = &pdma->chans[i]; in sf_pdma_remove()
578 devm_free_irq(&pdev->dev, ch->txirq, ch); in sf_pdma_remove()
579 devm_free_irq(&pdev->dev, ch->errirq, ch); in sf_pdma_remove()
580 list_del(&ch->vchan.chan.device_node); in sf_pdma_remove()
581 tasklet_kill(&ch->vchan.task); in sf_pdma_remove()
582 tasklet_kill(&ch->done_tasklet); in sf_pdma_remove()
583 tasklet_kill(&ch->err_tasklet); in sf_pdma_remove()
586 dma_async_device_unregister(&pdma->dma_dev); in sf_pdma_remove()
592 { .compatible = "sifive,fu540-c000-pdma" },
602 .name = "sf-pdma",