Lines Matching refs:HIDMA_EVCA_CTRLSTS_REG

30 #define HIDMA_EVCA_CTRLSTS_REG			0x000  macro
334 	val = readl(lldev->evca + HIDMA_EVCA_CTRLSTS_REG);  in hidma_ll_reset()
337 	writel(val, lldev->evca + HIDMA_EVCA_CTRLSTS_REG);  in hidma_ll_reset()
343 	ret = readl_poll_timeout(lldev->evca + HIDMA_EVCA_CTRLSTS_REG, val,  in hidma_ll_reset()
463 	val = readl(lldev->evca + HIDMA_EVCA_CTRLSTS_REG);  in hidma_ll_enable()
466 	writel(val, lldev->evca + HIDMA_EVCA_CTRLSTS_REG);  in hidma_ll_enable()
468 	ret = readl_poll_timeout(lldev->evca + HIDMA_EVCA_CTRLSTS_REG, val,  in hidma_ll_enable()
513 	val = readl(lldev->evca + HIDMA_EVCA_CTRLSTS_REG);  in hidma_ll_isenabled()
575 	val = readl(lldev->evca + HIDMA_EVCA_CTRLSTS_REG);  in hidma_ll_disable()
578 	writel(val, lldev->evca + HIDMA_EVCA_CTRLSTS_REG);  in hidma_ll_disable()
584 	ret = readl_poll_timeout(lldev->evca + HIDMA_EVCA_CTRLSTS_REG, val,  in hidma_ll_disable()